Paul Sultana

According to our database, Paul Sultana authored at least 2 papers between 2003 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2004

Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.

John Y. Oliver, Ravishankar Rao, Paul Sultana, Jedidiah R. Crandall, Erik Czernikowski, Leslie W. Jones IV, Diana Franklin, Venkatesh Akella, Frederic T. Chong

Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003

Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture.

John Y. Oliver, Ravishankar Rao, Paul Sultana, Jedidiah R. Crandall, Erik Czernikowski, Leslie W. Jones IV, Dean Copsey, Diana Keen, Venkatesh Akella, Frederic T. Chong

Proceedings of the Power-Aware Computer Systems, Third International Workshop, 2003