Paul T. M. van Zeijl

According to our database, Paul T. M. van Zeijl authored at least 16 papers between 2001 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Analysis of the Effect of PFD Sampling on Charge-Pump PLL Stability.

Debashis Dhar, Paul T. M. van Zeijl, Dusan M. Milosevic, Hao Gao, Peter G. M. Baltus

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Modeling and analysis of the effects of PLL phase noise on FMCW radar performance.

Debashis Dhar, Paul T. M. van Zeijl, Dusan M. Milosevic, Hao Gao, Arthur H. M. van Roermund

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Noise analysis of a BJT-based charge pump for low-noise PLL applications.

Debashis Dhar, Paul T. M. van Zeijl, Dusan M. Milosevic, Hao Gao, Peter G. M. Baltus

Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2012

A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines.

Chuang Lu, Reza Mahmoudi, Arthur H. M. van Roermund, Paul T. M. van Zeijl

Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux, 2012

2010

The theoretical efficiency in digital envelope power amplifiers for WLAN OFDM polar transmitters.

Paul T. M. van Zeijl, Manel Collados

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

An EFOM for cross-layer optimization towards low-power and high-performance wireless networks.

Xia Li, Peter G. M. Baltus, Dusan M. Milosevic, Arthur H. M. van Roermund, Paul T. M. van Zeijl

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Modelling and Measurements on minimum-width transmission-lines from 10-67GHz in 65nm CMOS.

Paul T. M. van Zeijl, Henry T. van der Zanden, Bob B. A. Theunissen, Henk A. H. Termeer

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A 70 GHz 10.2 mW self-demodulator for OOK modulation in 65-nm CMOS technology.

Xia Li, Peter G. M. Baltus, Paul T. M. van Zeijl, Dusan M. Milosevic, Arthur H. M. van Roermund

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

On the Attenuation of DAC Aliases Through Multiphase Clocking.

Paul T. M. van Zeijl, Manel Collados

IEEE Trans. Circuits Syst. II Express Briefs, 2009

Comments on "A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth".

Paul T. M. van Zeijl, Manel Collados

IEEE J. Solid State Circuits, 2009

2008

High-power digital envelope modulator for a polar transmitter in 65nm CMOS.

Manel Collados, Paul T. M. van Zeijl, Nenad Pavlovic

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A Digital Envelope Modulator for a WLAN OFDM Polar Transmitter in 90 nm CMOS.

Paul T. M. van Zeijl, Manel Collados

IEEE J. Solid State Circuits, 2007

2006

The effect of clock jitter on the DR of Sigma Delta modulators.

Robert H. M. van Veldhoven, Peter Nuijten, Paul T. M. van Zeijl

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2002

A Bluetooth radio in 0.18-μm CMOS.

Paul T. M. van Zeijl, Jan-Wim Th. Eikenbroek, Peter Paul Vervoort, Suma Setty, Jurjen Tangenberg, Gary Shipton, Eric Kooistra, Ids C. Keekstra, Didier Belot, Klaas Visser, Erwin Bosma, Stephan C. Blaakmeer

IEEE J. Solid State Circuits, 2002

A 1.1-V 270-μA mixed-signal hearing aid chip.

Paul T. M. van Zeijl, Jan-Wim Th. Eikenbroek, Peter Paul Vervoort, Suma Setty, Jurjen Tangenberg, Gary Shipton, Eric Kooistra, Ids C. Keekstra, Didier Belot, Klaas Visser, Erwin Bosma, Stephan C. Blaakmeer

IEEE J. Solid State Circuits, 2002

2001

One-chip Bluetooth ASIC Challenges.

Paul T. M. van Zeijl

Proceedings of the 38th Design Automation Conference, 2001