Pawel Tomaszewicz

Orcid: 0000-0002-7784-6595

According to our database1, Pawel Tomaszewicz authored at least 13 papers between 1999 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Cryptographic Coprocessor with Modular Architecture for Research and Development of Countermeasures Against Power-Based Side-Channel Attacks.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2015
Embedded Damage Localization Subsystem Based on Elastic Wave Propagation.
Comput. Aided Civ. Infrastructure Eng., 2015

Hardware Implementation of Rainbow Tables Generation for Hash Function Cryptanalysis.
Proceedings of the Information Systems Architecture and Technology: Proceedings of 36th International Conference on Information Systems Architecture and Technology - ISAT 2015, 2015

2014
Using Symbolic Functional Decomposition to Implement FSMs in Heterogenous FPGAs.
Proceedings of the Progress in Systems Engineering, 2014

Efficient Functional Decomposition Algorithm Based on Indexed Partition Calculus.
Proceedings of the Progress in Systems Engineering, 2014

2012
Virtualization Devices for Prototyping of Future Internet.
Proceedings of the 13th ACIS International Conference on Software Engineering, 2012

2011
SoPC Implementation of Whirlpool Hash Function.
Proceedings of the 21st International Conference on Systems Engineering (ICSEng 2011), 2011

On Memory Capacity to Implement Logic Functions.
Proceedings of the Computer Aided Systems Theory - EUROCAST 2011, 2011

2005
Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2001
Self-Testing of User-Programmed FPGAs Based on the Concept of Linear Segments.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000
Self-Testing of Linear Segments in User-Programmed FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
Self-Testing of S-Compatible Test Units in User-Programmed FPGAs.
Proceedings of the 25th EUROMICRO '99 Conference, 1999


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