Peng Kuang

Orcid: 0000-0002-7029-5655

According to our database1, Peng Kuang authored at least 14 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2024
Towards Real World Debiasing: A Fine-grained Analysis On Spurious Correlation.
CoRR, 2024

Ironies of Programming Automation: Exploring the Experience of Code Synthesis via Large Language Models.
Proceedings of the Companion Proceedings of the 8th International Conference on the Art, 2024

Developers' Perspective on Today's and Tomorrow's Programming Tool Assistance: A Survey.
Proceedings of the Companion Proceedings of the 8th International Conference on the Art, 2024

2023
Toward Gaze-assisted Developer Tools.
Proceedings of the 45th IEEE/ACM International Conference on Software Engineering: New Ideas and Emerging Results, 2023

Applying Machine Learning to Gaze Data in Software Development: a Mapping Study.
Proceedings of the 2023 Symposium on Eye Tracking Research and Applications, 2023

2022
DetectDUI: An In-Car Detection System for Drink Driving and BACs.
IEEE/ACM Trans. Netw., 2022

Enabling Application-Aware Traffic Engineering in IPv6 Networks.
IEEE Netw., 2022

Visual Cues in Compiler Conversations.
Proceedings of the 33rd Annual Workshop of the Psychology of Programming Interest Group, 2022

2021
Towards securing Duplicate Address Detection using P4.
Comput. Networks, 2021

Design of fuel Cell Test System Based on Modularization.
Proceedings of the AIAM 2021: 3rd International Conference on Artificial Intelligence and Advanced Manufacture, Manchester, United Kingdom, October 23, 2021

2020
P4DAD: Securing Duplicate Address Detection Using P4.
Proceedings of the 2020 IEEE International Conference on Communications, 2020

2018
NS4: Enabling Programmable Data Plane Simulation.
Proceedings of the Symposium on SDN Research, 2018

Prototype design of a time-of-flight camera based on Xilinx Zynq7000 SoC platform.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2018

2016
A 256-channel multi-phase clock sampling-based time-to-digital converter implemented in a Kintex-7 FPGA.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016


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