Peter B. Denyer

According to our database1, Peter B. Denyer authored at least 22 papers between 1980 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

1998
A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device.
IEEE J. Solid State Circuits, 1998

1997
Java<sup>TM</sup> in electronic design automation.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1992
A Comparison of Vector Quantization Codebook Generation Algorithms Applied to Automatic Face Recognition.
Proceedings of the British Machine Vision Conference, 1992

1991
On-Chip CMOS Sensors for VLSI Imaging Systems.
Proceedings of the VLSI 91, 1991

Address Generation for array access based on modulus m counters.
Proceedings of the conference on European design automation, 1991

1990
A new approach to pipeline optimisation.
Proceedings of the European Design Automation Conference, 1990

Memory, Control and Communications Synthesis for Scheduled Algorithms.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989
Synthesis of address generators.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988
Advanced Serial-Data Computation.
J. Parallel Distributed Comput., 1988

1987
Techniques to increase the computational throughput of bit-serial architectures.
Proceedings of the IEEE International Conference on Acoustics, 1987

Full-span structural compilation of DSP hardware.
Proceedings of the IEEE International Conference on Acoustics, 1987

Serial/Parallel architectures for area-efficient vector multiplication.
Proceedings of the IEEE International Conference on Acoustics, 1987

Synthesis of area-efficient VLSI architectures for vector and matrix multiplication.
Proceedings of the 8th IEEE Symposium on Computer Arithmetic, 1987

1986
Advanced Microelectronics as a Foundation for Future Computers (Panel).
Proceedings of the Information Processing 86, 1986

A comparison of micro-DSP and Silicon compiler implementations of a polyphase network filter bank.
Proceedings of the IEEE International Conference on Acoustics, 1986

Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic.
Proceedings of the IEEE International Conference on Acoustics, 1986

1984
A bit serial LDI recursive digital filter.
Proceedings of the IEEE International Conference on Acoustics, 1984

A bit serial linear array DFT.
Proceedings of the IEEE International Conference on Acoustics, 1984

1983
Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost.
Proceedings of the Proceedings International Test Conference 1983, 1983

Design and realisation of adaptive lattice filters.
Proceedings of the IEEE International Conference on Acoustics, 1983

Case studies in VLSI signal processing using a silicon compiler.
Proceedings of the IEEE International Conference on Acoustics, 1983

1980
Miniature CCD-based analog adaptive filters.
Proceedings of the IEEE International Conference on Acoustics, 1980


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