Robert K. Henderson

Orcid: 0000-0002-0398-7520

According to our database1, Robert K. Henderson authored at least 69 papers between 1997 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Resolution Limit of Single-Photon LiDAR.
CoRR, 2024

Single-Photon Counting Receivers for Optical Wireless Communications in Future 6G Networks.
IEEE Commun. Mag., 2024

2023
Guided Direct Time-of-Flight Lidar Using Stereo Cameras for Enhanced Laser Power Efficiency.
Sensors, November, 2023

On the Performance of SPAD-Based Optical Wireless Communication With ACO-OFDM.
IEEE Commun. Lett., July, 2023

Performance analysis of SPAD-based optical wireless communication with OFDM.
JOCN, 2023

Single-Photon Counting Receivers for 6G Optical Wireless Communications.
CoRR, 2023

2022
A High Dynamic Range 128 × 120 3-D Stacked CMOS SPAD Image Sensor SoC for Fluorescence Microendoscopy.
IEEE J. Solid State Circuits, 2022

SPAD-Based Optical Wireless Communication with ACO-OFDM.
CoRR, 2022

Video super-resolution for single-photon LIDAR.
CoRR, 2022

A direct time-of-flight image sensor with in-pixel surface detection and dynamic vision.
CoRR, 2022

2021
High-speed object detection with a single-photon time-of-flight image sensor.
CoRR, 2021

Robust and Guided Super-resolution for Single-Photon Depth Imaging via a Deep Network.
Proceedings of the 29th European Signal Processing Conference, 2021

2020
A 128 × 128 SPAD Motion-Triggered Time-of-Flight Image Sensor With In-Pixel Histogram and Column-Parallel Vision Processor.
IEEE J. Solid State Circuits, 2020

Robust super-resolution depth imaging via a multi-feature fusion deep network.
CoRR, 2020

2019
A Reconfigurable 3-D-Stacked SPAD Imager With In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging.
IEEE J. Solid State Circuits, 2019

A $192\times128$ Time Correlated SPAD Image Sensor in 40-nm CMOS Technology.
IEEE J. Solid State Circuits, 2019

A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging.
IEEE J. Solid State Circuits, 2019

Performance Analysis of SPAD-based OFDM.
CoRR, 2019

A 128×120 5-Wire 1.96mm<sup>2</sup> 40nm/90nm 3D Stacked SPAD Time Resolved Image Sensor SoC for Microendoscopy.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light Communications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD Imager.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 128 × 128 SPAD Dynamic Vision-Triggered Time of Flight Imager.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
Single-Photon Tracking for High-Speed Vision.
Sensors, 2018

High Dynamic Range Imaging at the Quantum Limit with Single Photon Avalanche Diode-Based Image Sensors.
Sensors, 2018

A 192×128 Time Correlated Single Photon Counting Imager in 40nm CMOS Technology.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017
A high dynamic range SPAD pixel for time of flight imaging.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017

Restoration of depth and intensity images using a graph laplacian regularization.
Proceedings of the 2017 IEEE 7th International Workshop on Computational Advances in Multi-Sensor Adaptive Processing, 2017

2016
Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors.
Sensors, 2016

2015
High-Speed Integrated Visible Light Communication System: Device Constraints and Design Considerations.
IEEE J. Sel. Areas Commun., 2015

11.5 A time-correlated single-photon-counting sensor with 14GS/S histogramming time-to-digital converter.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

An energy efficient high-speed digital LED driver for visible light communications.
Proceedings of the 2015 IEEE International Conference on Communications, 2015

Nonlinear Distortion in SPAD-Based Optical OFDM Systems.
Proceedings of the 2015 IEEE Globecom Workshops, San Diego, CA, USA, December 6-10, 2015, 2015

A SPAD-Based Visible Light Communications Receiver Employing Higher Order Modulation.
Proceedings of the 2015 IEEE Global Communications Conference, 2015

2014
A Fully Digital 8 × 16 SiPM Array for PET Applications With Per-Pixel TDCs and Real-Time Energy Output.
IEEE J. Solid State Circuits, 2014

320×240 oversampled digital single photon counting image sensor.
Proceedings of the Symposium on VLSI Circuits, 2014

Imaging-MIMO visible light communication system using μLEDs and integrated receiver.
Proceedings of the 2014 IEEE GLOBECOM Workshops, Austin, TX, USA, December 8-12, 2014, 2014

A 9.8 μm sample and hold time to amplitude converter CMOS SPAD pixel.
Proceedings of the 44th European Solid State Device Research Conference, 2014

A 256 × 8 SPAD line sensor for time resolved fluorescence and raman sensing.
Proceedings of the ESSCIRC 2014, 2014

2013
A Reconfigurable Single-Photon-Counting Integrating Receiver for Optical Communications.
IEEE J. Solid State Circuits, 2013

A Reconfigurable 1 GSps to 250 MSps, 7-bit to 9-bit Highly Time-Interleaved Counter ADC with Low Power Comparator Design.
IEEE J. Solid State Circuits, 2013

An 8×16-pixel 92kSPAD time-resolved sensor with on-pixel 64ps 12b TDC and 100MS/s real-time energy histogramming in 0.13µm CIS technology for PET/MRI applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Advanced fluorescence lifetime imaging algorithms for CMOS single-photon sensor based multi-focal multi-photon microscopy.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
A High-Throughput Time-Resolved Mini-Silicon Photomultiplier With Embedded Fluorescence Lifetime Estimation in 0.13 µm CMOS.
IEEE Trans. Biomed. Circuits Syst., 2012

Time-Domain Fluorescence Lifetime Imaging Techniques Suitable for Solid-State Imaging Sensor Arrays.
Sensors, 2012

A Time-Resolved, Low-Noise Single-Photon Image Sensor Fabricated in Deep-Submicron CMOS Technology.
IEEE J. Solid State Circuits, 2012

A 100Mphoton/s time-resolved mini-silicon photomultiplier with on-chip fluorescence lifetime estimation in 0.13μm CMOS imaging technology.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A silicon photomultiplier with >30% detection efficiency from 450-750nm and 11.6μm pitch NMOS-only pixel with 21.6% fill factor in 130nm CMOS.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

A gate Modulated avalanche bipolar transistor in 130nm CMOS technology.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

A reconfigurable 14-bit 60GPhoton/s Single-Photon receiver for visible light communications.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
An Implementation of a Spike-Response Model With Escape Noise Using an Avalanche Diode.
IEEE Trans. Biomed. Circuits Syst., 2011

A 128×96 pixel event-driven phase-domain ΔΣ-based fully digital 3D camera in 0.13μm CMOS imaging technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 160×128 single-photon image sensor with on-pixel 55ps 10b time-to-digital converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A Vertically Integrated CMOS Microsystem for Time-Resolved Fluorescence Analysis.
IEEE Trans. Biomed. Circuits Syst., 2010

A 200MHz 300ps 0.5pJ/ns optical pulse generator array in 0.35µm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Poisson distributed noise generation for spiking neural applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A CMOS Time-Resolved Fluorescence Lifetime Analysis Micro-System.
Sensors, 2009

NMOS-only Class-D Output Stages based on Charge Pump Architectures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

FPGA Implementation of a Video-rate Fluorescence Lifetime Imaging System with a 32×32 CMOS Single-photon Avalanche Diode Array.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Non-uniform Resolution Step GHz 7-bit Flash A/D Converter for Wideband OFDM Signal Conversion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domain.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A Microsystem for Time-Resolved Fluorescence Analysis using CMOS Single-Photon Avalanche Diodes and Micro-LEDs.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 90nm CMOS Dual-Channel Powerline Communication AFE for Homeplug AV with a Gb Extension.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

On-Chip Fluorescence Lifetime Extraction using Synchronous Gating Scheme - Theoretical Error Analysis and Practical Implementation.
Proceedings of the First International Conference on Biomedical Electronics and Devices, 2008

2006
Extended Dynamic Range From a Combined Linear-Logarithmic CMOS Image Sensor.
IEEE J. Solid State Circuits, 2006

Oversampled Time Estimation Techniques for Precision Photonic Detectors.
Proceedings of the IFIP VLSI-SoC 2006, 2006

1998
A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device.
IEEE J. Solid State Circuits, 1998

1997
A 19-bit low-power multibit sigma-delta ADC based on data weighted averaging.
IEEE J. Solid State Circuits, 1997


  Loading...