Philip M. Chopp

According to our database1, Philip M. Chopp authored at least 5 papers between 2007 and 2013.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
A 1-V 13-mW Single-Path Frequency-Translating ΔΣ Modulator With 55-dB SNDR and 4-MHz Bandwidth at 225 MHz.
IEEE J. Solid State Circuits, 2013

2011
A 1V 13mW frequency-translating ΔΣ ADC with 55dB SNDR for a 4MHz band at 225MHz.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
Design Constraints for Image-Reject Frequency-Translating Delta Sigma Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2007
Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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