Pradeep Shettigar

According to our database, Pradeep Shettigar authored at least 3 papers between 2012 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer.

Guowen Wei, Pradeep Shettigar, Feng Su, Xinyu Yu, Tom Kwan

Proceedings of the Symposium on VLSI Circuits, 2015

2012

Design Techniques for Wideband Single-Bit Continuous-Time Delta Sigma Modulators With FIR Feedback DACs.

Pradeep Shettigar, Shanthi Pavan

IEEE J. Solid State Circuits, 2012

A 15mW 3.6GS/s CT-ΔΣ ADC with 36MHz bandwidth and 83dB DR in 90nm CMOS.

Pradeep Shettigar, Shanthi Pavan

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012