Praveen Bhojwani

According to our database1, Praveen Bhojwani authored at least 12 papers between 2003 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
IntellBatt: Toward a Smarter Battery.
Computer, 2010

2009
A distributed concurrent on-line test scheduling protocol for many-core NoC-based systems.
Proceedings of the 27th International Conference on Computer Design, 2009

2008
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2008

An On-Demand Test Triggering Mechanism for NoC-Based Safety-Critical Systems.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

IntellBatt: towards smarter battery design.
Proceedings of the 45th Design Automation Conference, 2008

2007
An Infrastructure IP for Online Testing of Network-on-Chip Based SoCs.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

SAPP: scalable and adaptable peak power management in nocs.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

A Safety Analysis Framework for COTS Microprocessors in Safety-Critical Applications.
Proceedings of the Tenth IEEE International Symposium on High Assurance Systems Engineering (HASE 2007), 2007

A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip.
Proceedings of the 44th Design Automation Conference, 2007

2006
Core Network Interface Architecture and Latency Constrained On-Chip Communication.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2005
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2003
Interfacing Cores with On-chip Packet-Switched Networks.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003


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