Preetham Lakshmikanthan

According to our database1, Preetham Lakshmikanthan authored at least 6 papers between 2000 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2007
VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies.
SIGARCH Comput. Archit. News, 2007

2006
Design of Ultra-Low Power Combinational Standard Library Cells Using A Novel Leakage Reduction Methodology.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

A Novel Methodology to Reduce Leakage Power in CMOS Complementary Circuits.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2004
Robust simple hyperstable adaptive recursive algorithms.
Proceedings of the Second IASTED International Conference on Circuits, 2004

2000
A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints.
Proceedings of the Parallel and Distributed Processing, 2000


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