Priyank H. Prajapati

Orcid: 0000-0001-5075-1441

According to our database1, Priyank H. Prajapati authored at least 7 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Hardware Implementation of Weight Computation Techniques for Pair-Wise Orthogonal Transform Used in Onboard Satellite Spectral Preprocessing.
Proceedings of the National Conference on Communications, 2026

2023
Hardware implementation of 1D-CNN architecture for ECG arrhythmia classification.
Biomed. Signal Process. Control., August, 2023

2022
Hardware Efficient Low-Frequency Artifact Reduction Technique for Wearable ECG Device.
IEEE Trans. Instrum. Meas., 2022

Hardware Design of Two Stage Reference Free Adaptive Filter for ECG Denoising.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021
Two Stage Step-Size Scaler Adaptive Filter Design for ECG Denoising.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
FPGA Implementation of MRMN with Step-Size Scaler Adaptive Filter for Impulsive Noise Reduction.
Circuits Syst. Signal Process., 2020

CSD Optimized DWT Filter for ECG Denoising.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020


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