Pudi Dhilleswararao

According to our database, Pudi Dhilleswararao authored at least 9 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Automating functional unit and register binding for synchoros CGRA platform.

Pudi Dhilleswararao, Utsav Tiwari, Srinivas Boppu, Yu Yang, Ahmed Hemani

Des. Autom. Embed. Syst., June, 2024

Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study.

Pudi Dhilleswararao, Yu Yang, Dimitrios Stathis, Sunil Kumar Prajapati, Srinivas Boppu, Ahmed Hemani, Linga Reddy Cenkeramaddi

IEEE Access, 2024

Integer Linear Programming-Based Simultaneous Scheduling and Binding for SiLago Framework.

Pudi Dhilleswararao, Shivam Malviya, Srinivas Boppu, Yu Yang, Ahmed Hemani, Linga Reddy Cenkeramaddi

IEEE Access, 2024

2023

Design of Synthesis-time Vectorized Arithmetic Hardware for Tapered Floating-point Addition and Subtraction.

Ashish Reddy Bommana, Susheel Ujwal Siddamshetty, Pudi Dhilleswararao, Arvind Thumatti K. R., Srinivas Boppu, M. Sabarimalai Manikandan, Linga Reddy Cenkeramaddi

ACM Trans. Design Autom. Electr. Syst., 2023

Implementation of Image Averaging on DRRA and DiMArch Architectures.

Pudi Dhilleswararao, Vamsi Goudu, Srinivas Boppu, Ritika Ratnu, Ahmed Hemani

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures.

Pudi Dhilleswararao, Rajeev Ryansh, Srinivas Boppu, Yu Yang, Ahmed Hemani

Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2023

Implementation of Sobel Edge Detection on DRRA and DiMArch Architectures.

Pudi Dhilleswararao, Rajeev Ryansh, Vamsi Goudu, Srinivas Boppu, Ahmed Hemani

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey.

Pudi Dhilleswararao, Srinivas Boppu, M. Sabarimalai Manikandan, Linga Reddy Cenkeramaddi

IEEE Access, 2022

2021

Design and Implementation of Optimized Register File for Streaming Applications.

Ayazulla Khan Patan, Dimitrios Stathis, Pudi Dhilleswararao, Yu Yang, Srinivas Boppu, Ahmed Hemani

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021