Qianfeng Zhang
Orcid: 0000-0003-2115-9179
According to our database1,
Qianfeng Zhang authored at least 8 papers
between 2002 and 2026.
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Bibliography
2026
A 14-bit 4GS/s DAC Achieving 68dBc SFDR Up to 1.7GHz with Digital Pre-Distortion and Switching-Glitch Compensation in 28nm CMOS Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
Effective Resource Management for Hybrid NOMA-OMA Scheme in Satellite Networks With Statistical Delay QoS Constraints.
IEEE Internet Things J., August, 2025
IMTLM-Net: improved multi-task transformer based on localization mechanism network for handwritten English text recognition.
Complex Intell. Syst., 2025
A 4096-Channel, 1.13mW/Ch Pixel-Level Driver Circuits for Optical Phased Arrays with 12-Bit R-2R DAC and Cross-Coupled Push-Pull 15Vpp Voltage Output Amplifier.
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025
2023
User Pairing for Delay-Limited NOMA-Based Satellite Networks with Deep Reinforcement Learning.
Sensors, August, 2023
2020
Coexistence and Performance Limits for the Cognitive Broadband Satellite System and mmWave Cellular Network.
IEEE Access, 2020
2014
Implementation and evaluation of deep neural networks (DNN) on mainstream heterogeneous systems.
Proceedings of the Asia-Pacific Workshop on Systems, 2014
2002
Proceedings of the 2002 IEEE International Conference on Cluster Computing (CLUSTER 2002), 2002