Rainer Schlör

According to our database1, Rainer Schlör authored at least 12 papers between 1993 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2018
Analysis Using the Business Support Matrix: Elaborating Potential for Improving Application Landscapes in Logistics.
Proceedings of the 22nd IEEE International Enterprise Distributed Object Computing Workshop, 2018

2006
Cost-Efficient Worst-Case Execution Time Analysis in Industrial Practice.
Proceedings of the Leveraging Applications of Formal Methods, 2006

2002
Symbolic timing diagrams: a visual formalism for model verification.
PhD thesis, 2002

1998
Using a Visual Formalism for Design Verification in Industrial Environments.
Proceedings of the Services and Visualization: Towards User-Friendly Design, 1998

1996
Hardware synthesis from requirement specifications.
Proceedings of the conference on European design automation, 1996

1995
Symbolic Timing Diagrams.
Proceedings of the Formal Development of Reactive Systems - Case Study Production Cell, 1995

Statecharts.
Proceedings of the Formal Development of Reactive Systems - Case Study Production Cell, 1995

Verification of a production cell controller using symbolic timing diagrams.
Proceedings of the Proceedings EURO-DAC'95, 1995

1994
Interface Controller Synthesis from Requirement Specifications.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993
VHDL/S - integrating statecharts, timing diagrams, and VHDL.
Microprocess. Microprogramming, 1993

A net-based semantics for VHDL.
Proceedings of the European Design Automation Conference 1993, 1993

Specification and verification of VHDL-based system-level hardware designs.
Proceedings of the Specification and validation methods, 1993


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