Rajeev Narayanan

According to our database, Rajeev Narayanan authored at least 6 papers between 2010 and 2013.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2013

Statistical Run-Time Verification of Analog Circuits in Presence of Noise and Process Variation.

Rajeev Narayanan, Ibtissem Seghaier, Mohamed H. Zaki, Sofiène Tahar

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

Using LCSS algorithm for circuit level verification of analog designs.

Rajeev Narayanan, Alaeddine Daghar, Mohamed H. Zaki, Sofiène Tahar

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Verifying jitter in an analog and mixed signal design using dynamic time warping.

Rajeev Narayanan, Alaeddine Daghar, Mohamed H. Zaki, Sofiène Tahar

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

Ensuring correctness of analog circuits in presence of noise and process variations using pattern matching.

Rajeev Narayanan, Mohamed H. Zaki, Sofiène Tahar

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Using Stochastic Differential Equation for Verification of Noise in Analog/RF Circuits.

Rajeev Narayanan, Mohamed H. Zaki, Sofiène Tahar

J. Electron. Test., 2010

Formal verification of analog circuits in the presence of noise and process variation.

Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zaki, Sofiène Tahar, Lawrence C. Paulson

Proceedings of the Design, Automation and Test in Europe, 2010