Mohamed H. Zaki
According to our database^{1},
Mohamed H. Zaki
authored at least 34 papers
between 2006 and 2020.
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Bibliography
2020
Mating Sensitivity Analysis and Statistical Verification for Efficient Yield Estimation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Toward the Formalization of Macroscopic Models of Traffic Flow Using HigherOrderLogic Theorem Proving.
IEEE Access, 2020
2019
Fast CNNBased Object Tracking Using Localization Layers and Deep Features Interpolation.
Proceedings of the 15th International Wireless Communications & Mobile Computing Conference, 2019
2018
IEEE Trans. Intell. Transp. Syst., 2018
Accelerated and Reliable Analog Circuits Yield Analysis Using SMT Solving Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
2017
Exploiting bounds optimization for the semiformal verification of analog circuits.
Integr., 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Cross recurrence verification technique for process variationresilient analog circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
A Statistical Approach to Probe Chaos from Noise in Analog and Mixed Signal Designs.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Statistically Validating the Impact of Process Variations on Analog and Mixed Signal Designs.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA  May 21, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA  May 21, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA  May 21, 2014
2013
Statistical RunTime Verification of Analog Circuits in Presence of Noise and Process Variation.
IEEE Trans. Very Large Scale Integr. Syst., 2013
2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
IET Circuits Devices Syst., 2011
Proceedings of the NASA Formal Methods, 2011
Ensuring correctness of analog circuits in presence of noise and process variations using pattern matching.
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Using Stochastic Differential Equation for Verification of Noise in Analog/RF Circuits.
J. Electron. Test., 2010
Formal verification of analog circuits in the presence of noise and process variation.
Proceedings of the Design, Automation and Test in Europe, 2010
2009
J. Aerosp. Comput. Inf. Commun., 2009
Proceedings of 9th International Conference on Formal Methods in ComputerAided Design, 2009
2008
Microelectron. J., 2008
2007
Proceedings of the ISoLA 2007, 2007
Proceedings of the Computational Science  ICCS 2007, 7th International Conference, Beijing, China, May 27, 2007
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs.
Proceedings of the Formal Methods in ComputerAided Design, 7th International Conference, 2007
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL.
Proceedings of the Forum on specification and Design Languages, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006