Ralf Reetz

According to our database1, Ralf Reetz authored at least 6 papers between 1992 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1998
Formal Specification in VHDL for Hardware Verification.
Proceedings of the 1998 Design, 1998

1997
Eine Formalisierung der Hardwarebeschreibungssprache VHDL für die Hardware-Verifikation.
PhD thesis, 1997

1995
A Flowgraph Semantics of VHDL: Toward a VHDL Verification Workbench in HOL.
Formal Methods Syst. Des., 1995

Deep Embedding VHDL.
Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1995

1994
Simplifying Deep Embedding: A Formalised Code Generator.
Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994

1992
The associative processor system CAPRA: architecture and applications.
IEEE Micro, 1992


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