Thomas Kropf
According to our database1,
Thomas Kropf
authored at least 109 papers
between 1990 and 2023.
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Bibliography
2023
Proceedings of the IEEE Intelligent Vehicles Symposium, 2023
Proceedings of the 25th IEEE International Conference on Intelligent Transportation Systems, 2023
2022
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022
2020
Automated Graph-Based Fault Injection Into Virtual Prototypes for Robustness Evaluation.
Proceedings of the IEEE European Test Symposium, 2020
2017
Using Robustness Testing to Handle Incomplete Verification Results When Combining Verification and Testing Techniques.
Proceedings of the Testing Software and Systems, 2017
2016
Combining graph-based guidance with error effect simulation for efficient safety analysis.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Innov. Syst. Softw. Eng., 2015
J. Electron. Test., 2015
Proceedings of the Software Engineering and Formal Methods - 13th International Conference, 2015
Proceedings of the 41st Euromicro Conference on Software Engineering and Advanced Applications, 2015
2014
Proceedings of the Software Engineering and Formal Methods - 12th International Conference, 2014
Increasing Software Reliability by Integrating Formal Verification and Robustness Testing.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
Proceedings of the 15th Latin American Test Workshop, 2014
Proceedings of the Computational Science and Its Applications - ICCSA 2014 - 14th International Conference, Guimarães, Portugal, June 30, 2014
2013
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013
A Software Testing Framework to Integrate Formal Verification Results.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Proceedings of the 16th International IEEE Conference on Intelligent Transportation Systems, 2013
2012
Optimized Static Parameter Assignment for Semiformal Software Verification.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2012
2011
Softwaretechnik-Trends, 2011
Scalable and Extendable Hybrid Verification Platform.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the Quality of Information and Communications Technology, 2010
Proceedings of the FM+AM 2010, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Proceedings of the RE 2009, 17th IEEE International Requirements Engineering Conference, Atlanta, Georgia, USA, August 31, 2009
Semiformal verification of temporal properties in automotive hardware dependent software.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Semiformal Verification of Temporal Properties in Embedded Software.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the Forum on specification and Design Languages, 2007
Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development?
Proceedings of the Computer Aided Verification, 19th International Conference, 2007
2006
Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006
Monitoring-based Formal Hardware Verification.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the 4th International Workshop on Parallel and Distributed Methods in Verification, 2005
Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005
Proceedings of the Forum on specification and Design Languages, 2005
2004
Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004
Proceedings of the Integration of Software Specification Techniques for Applications in Engineering, 2004
2003
Formal Methods Syst. Des., 2003
Proceedings of the Forum on specification and Design Languages, 2003
2002
Combination of Simulation and Formal Verification.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 14th Euromicro Conference on Real-Time Systems (ECRTS 2002), 2002
2001
Formale Verifikation diskreter Echtzeitsysteme (Formal Verification of Discrete Real-Time Systems).
Informationstechnik Tech. Inform., 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
Proceedings of the 2000 Design, 2000
1999
Informationstechnik Tech. Inform., 1999
Recent Advancements in Hardware Verification - How to Make Theorem Proving Fit for an Industrial Usage.
Proceedings of the Theorem Proving in Higher Order Logics, 12th International Conference, 1999
Modeling Real-Time Systems with I/O-Interval Structures.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the Correct Hardware Design and Verification Methods, 1999
Automatic Error Correction of Large Circuits Using Boolean Decomposition and Abstraction.
Proceedings of the Correct Hardware Design and Verification Methods, 1999
Springer, ISBN: 978-3-662-03809-3, 1999
1998
Informationstechnik Tech. Inform., 1998
A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1998
Proceedings of the Formal Methods in Computer-Aided Design, 1998
Proceedings of the 1998 Design, 1998
1997
Proceedings of the Hybrid and Real-Time Systems, 1997
Proceedings of the Formal Hardware Verification - Methods and Systems in Comparison, 1997
Proceedings of the Formal Hardware Verification - Methods and Systems in Comparison, 1997
Proceedings of the European Design and Test Conference, 1997
Symbolic model checking for a discrete clocked temporal logic with intervals.
Proceedings of the Advances in Hardware Design and Verification, 1997
1996
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996
Proceedings of the 1996 European Design and Test Conference, 1996
1995
Formal Methods Syst. Des., 1995
J. Electron. Test., 1995
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
Proceedings of the 1995 European Design and Test Conference, 1995
1994
Formal Methods Syst. Des., 1994
Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994
Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994
Proceedings of the Theorem Provers in Circuit Design, 1994
Proceedings of the Theorem Provers in Circuit Design, 1994
Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Self Testable Boards with Standard IEEE 1149.5 Module Test and Maintenance (MTM) Bus Interface.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
A New Model to Uniformly Represent the Function and Timing of MOS Circuits and its Application to VHDL Simulation.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1993
Ein einheitlicher Ansatz zur Verifikation und Testerzeugung für digitale Schaltungen mit temporaler Logik.
PhD thesis, 1993
Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment.
Formal Methods Syst. Des., 1993
Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification.
Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993
Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993
Hardware-Verification using First Order BDDs.
Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993
Proceedings of the Correct Hardware Design and Verification Methods, 1993
1992
A methodology for the insertion of a hierarchical and boundary-scan compatible self test.
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Modelling Generic Hardware Structures by Abstract Datatypes.
Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992
Efficient Representation and Computation of Tableau Proofs.
Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992
Proceedings of the Second Great Lakes Symposium on VLSI, 1992
1991
Structure in Hardware Proofs: First Steps Towards Automation in a Higher-Order Environment.
Proceedings of the VLSI 91, 1991
First Steps Towards Automating Hardware Proofs in HOL.
Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991
Integrating a First-Order Automatic Prover in the HOL Environment.
Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991
A Common Approach to Test Generation and Hardware Verification Based on Temporal Logic.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991
1990
Microprocessing and Microprogramming, 1990