Ramesh Arvapalli

According to our database, Ramesh Arvapalli authored at least 2 papers between 2012 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family.

Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He

IEEE J. Solid State Circuits, 2013

2012

An energy efficient 32nm 20 MB L3 cache for Intel^® Xeon^® processor E5 family.

Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012