Moty Mehalel

According to our database1, Moty Mehalel authored at least 5 papers between 2007 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2013
An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family.
IEEE J. Solid State Circuits, 2013

2012
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.
IEEE J. Solid State Circuits, 2012

An energy efficient 32nm 20 MB L3 cache for Intel<sup>®</sup> Xeon<sup>®</sup> processor E5 family.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
A fully integrated multi-CPU, GPU and memory controller 32nm processor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2007
The Implementation of the 65nm Dual-Core 64b Merom Processor.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007


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