Ravi K. Kolagotla

According to our database1, Ravi K. Kolagotla authored at least 10 papers between 1992 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
Introduction to the Special Issue on the IEEE 2006 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2007

2004
Addressing mode driven low power data caches for embedded processors.
Proceedings of the 3rd Workshop on Memory Performance Issues, 2004

2002
High performance dual-MAC DSP architecture.
IEEE Signal Process. Mag., 2002

2001
A 333-MHz dual-MAC DSP architecture for next-generation wireless applications.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
Design and implementation of a 16 by 16 low-power two's complement multiplier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1994
Optimal unified architectures for the real-time computation of time-recursive discrete sinusoidal transforms.
IEEE Trans. Circuits Syst. Video Technol., 1994

1993
Systolic architectures for finite-state vector quantization.
J. VLSI Signal Process., 1993

VLSI implementation of a tree searched vector quantizer.
IEEE Trans. Signal Process., 1993

Optimal unified IIR architectures for time-recursive discrete sinusoidal transforms.
Proceedings of the IEEE International Conference on Acoustics, 1993

1992
Design and Implementation of Systolic Architectures for Vector Quantization.
PhD thesis, 1992


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