Reiner Kolla

According to our database, Reiner Kolla authored at least 38 papers between 1983 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

TwoPhases: A transmission scheme to reduce the link width at deflection routing based Network-on-Chips.

Armin Runge, Reiner Kolla

J. Syst. Archit., 2017

MCGC: A Network Coding Approach for Reliable Large-scale Wireless Networks.

Isabel Madeleine Runge, Reiner Kolla

Proceedings of the First ACM International Workshop on the Engineering of Reliable, 2017

2016

Using benes networks at fault-tolerant and deflection routing based network-on-chips.

Armin Runge, Reiner Kolla

Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

Consideration of the Flit Size for Deflection Routing based Network-on-Chips.

Armin Runge, Reiner Kolla

Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2016

A wearable 1-lead necklace ECG for continuous heart rate monitoring.

Aulia Arif Iskandar, Reiner Kolla, Klaus Schilling, Wolfram Völker

Proceedings of the 18th IEEE International Conference on e-Health Networking, 2016

An Alternating Transmission Scheme for Deflection Routing Based Network-on-Chips.

Armin Runge, Reiner Kolla

Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016

2011

Precise self-calibration of ultrasound based indoor localization systems.

Armin Runge, Marcel Baunach, Reiner Kolla

Proceedings of the 2011 International Conference on Indoor Positioning and Indoor Navigation, 2011

2007

Beyond Theory: Development of a Real World Localization Application as Low Power WSN.

Marcel Baunach, Reiner Kolla, Clemens Muhlberger

Proceedings of the 32nd Annual IEEE Conference on Local Computer Networks (LCN 2007), 2007

A Method for Self-Organizing Communication in WSN Based Localization Systems: HashSlot.

Marcel Baunach, Reiner Kolla, Clemens Muhlberger

Proceedings of the 32nd Annual IEEE Conference on Local Computer Networks (LCN 2007), 2007

2003

Disproving the Perfect-Rate Property of Data-Flow Graphs Unfolded by the Least Common Multiple of the Number of Loop Registers.

Frank Wolz, Reiner Kolla

IEEE Trans. Computers, 2003

2002

A Retargetable Macro Generation Method for the Evaluation of Repetitive Configurable Architectures.

Frank Wolz, Reiner Kolla

Proceedings of the Field-Programmable Logic and Applications, 2002

2001

Bubble Partitioning for LUT-Based Sequential Circuits.

Frank Wolz, Reiner Kolla

Proceedings of the Field-Programmable Logic and Applications, 2001

2000

Technology Binding.

Reiner Kolla

Inform. Spektrum, 2000

A New Floorplanning Method for FPGA Architectural Research.

Frank Wolz, Reiner Kolla

Proceedings of the Field-Programmable Logic and Applications, 2000

1999

Spanning Tree-based State Encoding for Low Power Dissipation.

Winfried Nöth, Reiner Kolla

Proceedings of the 1999 Design, 1999

Splitting Double Precision FPUs for Single Precision Interval Arithmetic.

Reiner Kolla, A. Vodopivec, Jürgen Wolff von Gudenberg

Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

1998

PACE: Processor Architectures for Circuit Emulation.

Reiner Kolla, Oliver Springauf

Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

Boolean Matching for Large Libraries.

Uwe Hinsberger, Reiner Kolla

Proceedings of the 35th Conference on Design Automation, 1998

1997

Node normalization and decomposition in low power technology mapping.

Winfried Nöth, Reiner Kolla

Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

A parallel hybrid approach to hard optimization problems.

Uwe Hinsberger, Reiner Kolla, Markus Wild

Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1996

TROY: A Tree-Based Approach to Logic Synthesis and Technology Mapping.

Winfried Nöth, Uwe Hinsberger, Reiner Kolla

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Optimal technology mapping for single output cells.

Uwe Hinsberger, Reiner Kolla

Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995

1992

A cell-based approach to performance optimization of fanout-free circuits.

Uwe Hinsberger, Reiner Kolla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Performance Optimization of Combinational Circuits.

Uwe Hinsberger, Reiner Kolla

Proceedings of the Informatik, Festschrift zum 60. Geburtstag von Günter Hotz, 1992

1991

The Virtual Feedback Problem in Hierarchical Representations of Combinational Circuits.

Reiner Kolla, Bernd Serf

Acta Informatica, 1991

1990

Minimal Area Sizing of Power Supply Nets in VLSI Circuits.

Reiner Kolla

J. Inf. Process. Cybern., 1990

A dynamic programming approach to the power supply net sizing problem.

Reiner Kolla

Proceedings of the European Design Automation Conference, 1990

Cell based performance optimization of combinational circuits.

Uwe Hinsberger, Reiner Kolla

Proceedings of the European Design Automation Conference, 1990

A graphical system for hierarchical specifications and checkups of VLSI circuits.

Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann

Proceedings of the European Design Automation Conference, 1990

1989

A note on hierarchical layer-assignment.

Reiner Kolla, Paul Molitor

Integr., 1989

Einführung in den VLSI-Entwurf.

Reiner Kolla, Paul Molitor, Hans-Georg Osthof

Leitfäden und Monographien der Informatik, Teubner, ISBN: 978-3-519-02273-2, 1989

1988

On the Construction of Optimal Time Adders (Extended Abstract).

Bernd Becker, Reiner Kolla

Proceedings of the STACS 88, 1988

1987

Spezifikation und Expansion logisch-topologischer Netze.

Reiner Kolla

PhD thesis, 1987

Hierarchical Design Based on a Calculus of Nets.

Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

1986

Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil II.

Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor

Inform. Forsch. Entwickl., 1986

Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil I.

Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor

Inform. Forsch. Entwickl., 1986

On Network Algebras and Recursive Equations.

Günter Hotz, Reiner Kolla, Paul Molitor

Proceedings of the Graph-Grammars and Their Application to Computer Science, 1986

1983

Where-Oblivious is not Sufficient.

Reiner Kolla

Inf. Process. Lett., 1983