Reza Sharafinejad

According to our database, Reza Sharafinejad authored at least 3 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Incremental SAT-Based Accurate Auto-Correction of Sequential Circuits Through Automatic Test Pattern Generation.

Bijan Alizadeh, Seyyed Reza Sharafinejad

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018

Automatic Correction of Dynamic Power Management Architecture in Modern Processors.

Reza Sharafinejad, Bijan Alizadeh, Zainalabedin Navabi

IEEE Trans. Very Large Scale Integr. Syst., 2018

2015

UPF-based formal verification of low power techniques in modern processors.

Reza Sharafinejad, Bijan Alizadeh, Masahiro Fujita

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015