Richard Veras

Orcid: 0000-0003-2633-3391

According to our database1, Richard Veras authored at least 16 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Reinforcement Learning for Graph Coloring: Understanding the Power and Limits of Non-Label Invariant Representations.
CoRR, 2024

2023
Observe Locally, Classify Globally: Using GNNs to Identify Sparse Matrix Structure.
Proceedings of the Advances in Computational Intelligence, 2023

A Framework for Analyzing the Robustness of Graph Models.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

2022
Using q-learning to select the best among functionally equivalent implementations.
Proceedings of the ARRAY '22: 8th ACM SIGPLAN International Workshop on Libraries, 2022

2021
On Large-Scale Matrix-Matrix Multiplication On Compressed Structures.
Proceedings of the 2021 IEEE International Conference on Big Data (Big Data), 2021

2019
Analytical cache modeling and tilesize optimization for tensor contractions.
Proceedings of the International Conference for High Performance Computing, 2019

2018
SPIRAL: Extreme Performance Portability.
Proc. IEEE, 2018

2017
A Systematic Approach for Obtaining Performance on Matrix-Like Operations.
PhD thesis, 2017

A scale-free structure for real world networks.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

2016
Automating the Last-Mile for High Performance Dense Linear Algebra.
CoRR, 2016

Compilers, hands-off my hands-on optimizations.
Proceedings of the 3rd Workshop on Programming Models for SIMD/Vector Processing, 2016

A scale-free structure for power-law graphs.
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016

2014
Capturing the Expert: Generating Fast Matrix-Multiply Kernels with Spiral.
Proceedings of the High Performance Computing for Computational Science - VECPAR 2014 - 11th International Conference, Eugene, OR, USA, June 30, 2014

2013
When polyhedral transformations meet SIMD code generation.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

A stencil compiler for short-vector SIMD architectures.
Proceedings of the International Conference on Supercomputing, 2013

2012
RAIDR: Retention-aware intelligent DRAM refresh.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012


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