Franz Franchetti

According to our database1, Franz Franchetti authored at least 116 papers between 2001 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2020
A Flexible Framework for Multidimensional DFTs.
SIAM J. Sci. Comput., 2020

Verified Translation Between Purely Functional and Imperative Domain Specific Languages in HELIX.
Proceedings of the Software Verification - 12th International Conference, 2020

Massive Scaling of MASSIF: Algorithm Development and Analysis for Simulation on GPUs.
Proceedings of the PASC '20: Platform for Advanced Scientific Computing Conference, Geneva, Switzerland, June 29, 2020

FESIA: A Fast and SIMD-Efficient Set Intersection Approach on Modern CPUs.
Proceedings of the 36th IEEE International Conference on Data Engineering, 2020

GBTLX: A First Look.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

FFTE on SVE: SPIRAL-Generated Kernels.
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2020

2019
A Flexible Framework for Parallel Multi-Dimensional DFTs.
CoRR, 2019

Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

FFTX for Micromechanical Stress-Strain Analysis.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

2018
From High-Level Specification to High-Performance Code.
Proc. IEEE, 2018

SPIRAL: Extreme Performance Portability.
Proc. IEEE, 2018

Large Bandwidth-Efficient FFTs on Multicore and Multi-socket Systems.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium, 2018

High Performance Zero-Memory Overhead Direct Convolutions.
Proceedings of the 35th International Conference on Machine Learning, 2018

HELIX: a case study of a formal verification of high performance program generation.
Proceedings of the 7th ACM SIGPLAN International Workshop on Functional High-Performance Computing, 2018

Preliminary Exploration of Large-Scale Triangle Counting on Shared-Memory Multicore System.
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV.
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

Fast and accurate object detection in high resolution 4K and 8K video using GPUs.
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

Linear Algebraic Formulation of Edge-centric K-truss Algorithms with Adjacency Matrices.
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

Large-Scale Algorithm Design for Parallel FFT-based Simulations on GPUs.
Proceedings of the 2018 IEEE Global Conference on Signal and Information Processing, 2018

2017
Algebraic description and automatic generation of multigrid methods in SPIRAL.
Concurr. Comput. Pract. Exp., 2017

Multirotor UAV state prediction through multi-microphone side-channel fusion.
Proceedings of the 2017 IEEE International Conference on Multisensor Fusion and Integration for Intelligent Systems, 2017

A scale-free structure for real world networks.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

Algorithm and hardware co-optimized solution for large SpMV problems.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

Mixed data layout kernels for vectorized complex arithmetic.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

First look: Linear algebra-based triangle counting without matrix multiplication.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

High Assurance Code Generation for Cyber-Physical Systems.
Proceedings of the 18th IEEE International Symposium on High Assurance Systems Engineering, 2017

2016
FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation.
J. Signal Process. Syst., 2016

Accelerating Architectural Simulation Via Statistical Techniques: A Survey.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

HAMLeT Architecture for Parallel Data Reorganization in Memory.
IEEE Micro, 2016

Automating the Last-Mile for High Performance Dense Linear Algebra.
CoRR, 2016

Compilers, hands-off my hands-on optimizations.
Proceedings of the 3rd Workshop on Programming Models for SIMD/Vector Processing, 2016

A scale-free structure for power-law graphs.
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016

3D DRAM based application specific hardware accelerator for SpMV.
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016


Big data computation of taxi movement in New York City.
Proceedings of the 2016 IEEE International Conference on Big Data, 2016

2015
Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x.
Computer, 2015

Enabling portable energy efficiency with memory accelerated library.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Data reorganization in memory using 3D-stacked DRAM.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Generating Optimized Fourier Interpolation Routines for Density Functional Theory Using SPIRAL.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

An ensemble technique for estimating vehicle speed and gear position from acoustic data.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

Optimizing Space Time Adaptive Processing through accelerating memory-bounded operations.
Proceedings of the 2015 IEEE High Performance Extreme Computing Conference, 2015

A synthesis methodology for application-specific logic-in-memory designs.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Special issue on automatic application tuning for HPC architectures.
Sci. Program., 2014

Capturing the Expert: Generating Fast Matrix-Multiply Kernels with Spiral.
Proceedings of the High Performance Computing for Computational Science - VECPAR 2014 - 11th International Conference, Eugene, OR, USA, June 30, 2014

Barometric and GPS altitude sensor fusion.
Proceedings of the IEEE International Conference on Acoustics, 2014

FFTS with near-optimal memory access through block data layouts.
Proceedings of the IEEE International Conference on Acoustics, 2014

Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Efficient and secure intellectual property (IP) design with split fabrication.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Understanding the design space of DRAM-optimized hardware FFT accelerators.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013
Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation.
J. Signal Process. Syst., 2013

An Information-Theoretic Approach to PMU Placement in Electric Power Systems.
IEEE Trans. Smart Grid, 2013

Automatic Application Tuning for HPC Architectures (Dagstuhl Seminar 13401).
Dagstuhl Reports, 2013

Power system probabilistic and security analysis on commodity high performance computing systems.
Proceedings of the 3rd International Workshop on High Performance Computing, 2013

When polyhedral transformations meet SIMD code generation.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

A Quasi-Monte Carlo approach for radial distribution system probabilistic load flow.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference, 2013

A stencil compiler for short-vector SIMD architectures.
Proceedings of the International Conference on Supercomputing, 2013

Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013

A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012
Computer Generation of Hardware for Linear Digital Signal Processing Transforms.
ACM Trans. Design Autom. Electr. Syst., 2012

A Smart Memory Accelerated Computed Tomography Parallel Backprojection.
Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

Cost-effective smart memory implementation for parallel backprojection in computed tomography.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Automatic Generation of the HPC Challenge's Global FFT Benchmark for BlueGene/P.
Proceedings of the High Performance Computing for Computational Science, 2012

Highly Efficient Performance Portable Tracking of Evolving Surfaces.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Polar format synthetic aperture radar in energy efficient application-specific logic-in-memory.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Optimized parallel distribution load flow solver on commodity multi-core CPU.
Proceedings of the IEEE Conference on High Performance Extreme Computing, 2012

Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only).
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

Design Automation Framework for Application-Specific Logic-in-Memory Blocks.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012

2011
Spiral.
Proceedings of the Encyclopedia of Parallel Computing, 2011

FFT (Fast Fourier Transform).
Proceedings of the Encyclopedia of Parallel Computing, 2011

Autotuning a Random Walk Boolean Satisfiability Solver.
Proceedings of the International Conference on Computational Science, 2011

On-line Decentralized Charging of Plug-In Electric Vehicles in Power Systems
CoRR, 2011

Automatic SIMD vectorization of fast fourier transforms for the larrabee and AVX instruction sets.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

Real-time software implementation of an IEEE 802.11a baseband receiver on Intel multicore.
Proceedings of the IEEE International Conference on Acoustics, 2011

Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures.
Proceedings of the Compiler Construction - 20th International Conference, 2011

2010
High Performance Stereo Vision Designed for Massively Data Parallel Platforms.
IEEE Trans. Circuits Syst. Video Technol., 2010

Abstract only: SPIRAL-generated modular FFTs.
ACM Commun. Comput. Algebra, 2010

Fast bilateral filtering by adapting block size.
Proceedings of the International Conference on Image Processing, 2010

Fast and robust active contours for image segmentation.
Proceedings of the International Conference on Image Processing, 2010

Hardware implementation of the discrete fourier transform with non-power-of-two problem size.
Proceedings of the IEEE International Conference on Acoustics, 2010

Computer Generation of Efficient Software Viterbi Decoders.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

Spiral-generated modular FFT algorithms.
Proceedings of the 4th International Workshop on Parallel Symbolic Computation, 2010

2009
Discrete fourier transform on multicore.
IEEE Signal Process. Mag., 2009

Computer generation of fast fourier transforms for the cell broadband engine.
Proceedings of the 23rd international conference on Supercomputing, 2009

Generating high performance pruned FFT implementations.
Proceedings of the IEEE International Conference on Acoustics, 2009

Operator Language: A Program Generation Framework for Fast Kernels.
Proceedings of the Domain-Specific Languages, IFIP TC 2 Working Conference, 2009

2008
BlueGene/L applications: Parallelism On a Massive Scale.
Int. J. High Perform. Comput. Appl., 2008

Domain-specific library generation for parallel software and hardware platforms.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Formal datapath representation and manipulation for implementing DSP transforms.
Proceedings of the 45th Design Automation Conference, 2008

Generating SIMD Vectorized Permutations.
Proceedings of the Compiler Construction, 17th International Conference, 2008

System Demonstration of Spiral: Generator for High-Performance Linear Transform Libraries.
Proceedings of the Algebraic Methodology and Software Technology, 2008

2007
SIMD Vectorization of Non-Two-Power Sized FFTs.
Proceedings of the IEEE International Conference on Acoustics, 2007

FFT Compiler: from math to efficient hardware HLDVT invited short paper.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007

Performance/Energy Optimization of DSP Transforms on the XScale Processor.
Proceedings of the High Performance Embedded Architectures and Compilers, 2007

How to Write Fast Numerical Code: A Small Introduction.
Proceedings of the Generative and Transformational Techniques in Software Engineering II, 2007

Generating FPGA-Accelerated DFT Libraries.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
A Rewriting System for the Vectorization of Signal Transforms.
Proceedings of the High Performance Computing for Computational Science, 2006

Gordon Bell finalists I - Large-scale electronic structure calculations of high-Z metals on the BlueGene/L platform.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Tools and techniques for performance - FFT program generation for shared memory: SMP and multicore.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Automatic Performance Optimization of the Discrete Fourier Transform on Distributed Memory Computers.
Proceedings of the Parallel and Distributed Processing and Applications, 2006

Program generation for the all-pairs shortest path problem.
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006

2005
SPIRAL: Code Generation for DSP Transforms.
Proc. IEEE, 2005

Efficient Utilization of SIMD Extensions.
Proc. IEEE, 2005

Vectorization techniques for the Blue Gene/L double FPU.
IBM J. Res. Dev., 2005

Large-Scale First-Principles Molecular Dynamics simulations on the BlueGene/L Platform using the Qbox code.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

Formal loop merging for signal transforms.
Proceedings of the ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, 2005

Performance analysis of the filtered backprojection image reconstruction algorithms.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
Automatically Tuned FFTs for BlueGene/L's Double FPU.
Proceedings of the High Performance Computing for Computational Science, 2004

FFT Compiler Techniques.
Proceedings of the Compiler Construction, 13th International Conference, 2004

2003
On Using ZENTURIO for Performance and Parameter Studies on Cluster and Grid Architectures.
Proceedings of the 11th Euromicro Workshop on Parallel, 2003

Short Vector Code Generation for the Discrete Fourier Transform.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Short vector code generation and adaptation for DSP algorithms.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

SIMD Vectorization of Straight Line FFT Code.
Proceedings of the Euro-Par 2003. Parallel Processing, 2003

2002
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2001
Architecture independent short vector FFTs.
Proceedings of the IEEE International Conference on Acoustics, 2001


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