Robert Bushey
According to our database1,
Robert Bushey
authored at least 7 papers
between 2012 and 2016.
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Bibliography
2016
Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications.
J. Signal Process. Syst., 2016
2015
Conceptual Abstraction Levels (CALs) for managing design complexity of market-oriented MPSoCs.
Microprocess. Microsystems, 2015
2014
Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs.
IEEE Embed. Syst. Lett., 2014
Function-Level Processor (FLP): Raising efficiency by operating at function granularity for market-oriented MPSoC.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
Algorithm and architecture co-design of Mixture of Gaussian (MoG) background subtraction for embedded vision.
Proceedings of the 2013 Asilomar Conference on Signals, 2013
Flexible function-level acceleration of embedded vision applications using the Pipelined Vision Processor.
Proceedings of the 2013 Asilomar Conference on Signals, 2013
2012
ADI's revolutionary BF60x vision focused digital signal processor system on chip: 25 billion operations/sec @ 80 mW and zero bandwidth.
Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012