Robert Czerwinski

According to our database, Robert Czerwinski authored at least 12 papers between 2005 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

State Assignment and Optimization of Ultra-High-Speed FSMs Utilizing Tristate Buffers.

Robert Czerwinski, Dariusz Kania

ACM Trans. Design Autom. Electr. Syst., 2016

An IEC 61131-3-based PLC implemented by means of an FPGA.

Miroslaw Chmiel, Józef Kulisz, Robert Czerwinski, A. Krzyzyk, Marcin Rosol, Patryk Smolarek

Microprocess. Microsystems, 2016

2015

Performance analysis of a PMSM drive with torque and speed control.

Tomasz Rudnicki, Robert Czerwinski, Dariusz Polok, Andrzej Sikora

Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

2013

FPGA Implementation of Programmable Logic Controller Compliant with EN 61131-3.

Robert Czerwinski, Miroslaw Chmiel, Wojciech Wygrabek

Proceedings of the 12th IFAC Conference on Programmable Devices and Embedded Systems, 2013

2012

Area and speed oriented synthesis of FSMs for PAL-based CPLDs.

Robert Czerwinski, Dariusz Kania

Microprocess. Microsystems, 2012

2010

A PC-based object simulator for supporting PLC software development.

Józef Kulisz, Robert Czerwinski, Jan Mocha, Miroslaw Chmiel

Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

The virtual drum kit.

Piotr Foltyn, Przemyslaw Flak, Robert Czerwinski, Tomasz Rudnicki

Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

2009

Synthesis of finite state machines for CPLDs.

Robert Czerwinski, Dariusz Kania

Int. J. Appl. Math. Comput. Sci., 2009

State assignment and logic optimization for finite state machines.

Robert Czerwinski, Dariusz Kania

Proceedings of the 9th IFAC Workshop on Programmable Devices and Embedded Systems, 2009

State machine description oriented towards effective usage of vendor-independent synthesis tools.

Robert Czerwinski, Józef Kulisz

Proceedings of the 9th IFAC Workshop on Programmable Devices and Embedded Systems, 2009

CPLD-oriented Synthesis of Finite State Machines.

Robert Czerwinski, Dariusz Kania

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2005

State Assignment for PAL-based CPLDs.

Robert Czerwinski, Dariusz Kania

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005