Roger Griesmer

According to our database, Roger Griesmer authored at least 4 papers between 1996 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Die Area Reduction by Decongesting Top Channels Using Novel Feedthrough Insertion Methodology in Hierarchical SoC Designs.

Rajanikant Sakariya, Subhadeep Aich, Vivek Joshi, Roger Griesmer

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

2013

Heterogeneous Multi-processor Coherent Interconnect.

Kai Chirca, Matthew Pierson, Joe Zbiciak, David Thompson, Daniel Wu, Shankar Myilswamy, Roger Griesmer, Kedar Basavaraj, Thomas Huynh, Akshit Dayal, Junbok You, Patrick Eyres, Yusuf Ghadiali, Todd Beck, Anthony M. Hill, Naveen Bhoria, Duc Bui, Jonathan Tran, Mujibur Rahman, Hong Fei, Shoban Jagathesan, Tim Anderson

Proceedings of the IEEE 21st Annual Symposium on High-Performance Interconnects, 2013

2004

Interconnect Modeling for Copper/Low-k Technologies.

N. S. Nagaraj, Tom Bonifield, Abha Singh, Roger Griesmer, Poras T. Balsara

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

1996

A Unique Methodology for At-Speed Test of cDSP^TM and ASIC Devices.

David Potts, Roger Griesmer

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996