Rohit Chaurasiya

According to our database, Rohit Chaurasiya authored at least 13 papers between 2018 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

SHIELD8-UAV: Sequential 8-bit Hardware Implementation of a Precision-Aware 1D-F-CNN for Low-Energy UAV Acoustic Detection and Temporal Tracking.

Susmita Ghanta, Karan Nathwani, Rohit Chaurasiya

CoRR, March, 2026

Design and FPGA Implementation of a Wide-Range and Area-Efficient Programmable Frequency Divider.

Shriniket Hemant Tare, Rohit Chaurasiya, Dron Sankhala, Chandan Yadav

Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026

2025

Energy-Preserving Indirect-Feedback for Wireless Power Transfer: Algorithm and Hardware Architecture.

Siddhartha Sarma, Rahul Shrestha, Rohit B. Chaurasiya

IEEE Trans. Green Commun. Netw., December, 2025

Exploring Elemental Properties of Intelligent Reflecting Surfaces.

Ravi Kushwaha, Rohit Chaurasiya, Roshan Bodile, Aryan Kaushik, Rohit Singh, Wonjae Shin

Proceedings of the IEEE International Conference on Communications, 2025

2022

Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Very Large Scale Integr. Syst., 2022

Design and ASIC-Implementation of Hardware-Efficient Cooperative Spectrum-Sensor for Data Fusion-Based Cognitive Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Consumer Electron., 2022

2021

A New Hardware-Efficient Spectrum-Sensor VLSI Architecture for Data-Fusion-Based Cooperative Cognitive-Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Very Large Scale Integr. Syst., 2021

Area-Efficient and Scalable Data-Fusion Based Cooperative Spectrum Sensor for Cognitive Radio.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Hardware-Efficient ASIC Implementation of Eigenvalue Based Spectrum Sensor Reconfigurable-Architecture for Cooperative Cognitive-Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Fast Sensing-Time and Hardware-Efficient Eigenvalue-Based Blind Spectrum Sensors for Cognitive Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

2019

Hardware-Efficient and Fast Sensing-Time Maximum-Minimum-Eigenvalue-Based Spectrum Sensor for Cognitive Radio Network.

Rohit B. Chaurasiya, Rahul Shrestha

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Hardware-Efficient and Low Sensing-Time VLSI-Architecture of MED Based Spectrum Sensor for Cognitive Radio.

Rohit B. Chaurasiya, Rahul Shrestha

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Parameterized Posit Arithmetic Hardware Generator.

Rohit Chaurasiya, John L. Gustafson, Rahul Shrestha, Jonathan Neudorfer, Sangeeth Nambiar, Kaustav Niyogi, Farhad Merchant, Rainer Leupers

Proceedings of the 36th IEEE International Conference on Computer Design, 2018