Ruwan N. S. Ratnayake

According to our database, Ruwan N. S. Ratnayake authored at least 4 papers between 2004 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Serial Sum-Product Architecture for Low-Density Parity-Check Codes.

Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei

Proceedings of the 16th International Conference on Computer Communications and Networks, 2007

A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders.

Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei

Proceedings of the Global Communications Conference, 2007

A High-Throughput Maximum a posteriori Probability Detector.

Ruwan N. S. Ratnayake, Aleksandar Kavcic, Gu-Yeon Wei

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2004

Pipelined parallel architecture for high throughput MAP detectors.

Ruwan N. S. Ratnayake, Gu-Yeon Wei, Aleksandar Kavcic

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004