S. Dinesh Kumar

According to our database1, S. Dinesh Kumar authored at least 22 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2021
Novel Secure MTJ/CMOS Logic (SMCL) for Energy-Efficient and DPA-Resistant Design.
SN Comput. Sci., 2021

2020
Quasi-Adiabatic SRAM Based Silicon Physical Unclonable Function.
SN Comput. Sci., 2020

Exploration of Solar Cell Materials for Developing Novel PUFs in Cyber-Physical Systems.
SN Comput. Sci., 2020

Design of Adiabatic Logic-Based Energy-Efficient and Reliable PUF for IoT Devices.
ACM J. Emerg. Technol. Comput. Syst., 2020

Special Session: A Novel Low-Power and Energy-Efficient Adiabatic Logic-In-Memory Architecture Using CMOS/MTJ.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019
EE-SPFAL: A Novel Energy-Efficient Secure Positive Feedback Adiabatic Logic for DPA Resistant RFID and Smart Card.
IEEE Trans. Emerg. Top. Comput., 2019

Post-Layout Simulation of Quasi-Adiabatic Logic Based Physical Unclonable Function.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018
FinSAL: FinFET-Based Secure Adiabatic Logic for Energy-Efficient and DPA Resistant IoT Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Solar Cell Based Physically Unclonable Function for Cybersecurity in IoT Devices.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Hardware Trojan Detection in Implantable Medical Devices Using Adiabatic Computing.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

Energy-recovery based hardware security primitives for low-power embedded devices.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2017
Energy-efficient magnetic 4-2 compressor.
Microelectron. J., 2017

Design exploration of a Symmetric Pass Gate Adiabatic Logic for energy-efficient and secure hardware.
Integr., 2017

Adiabatic Computing Based Low-Power and DPA-Resistant Lightweight Cryptography for IoT Devices.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Security Evaluation of MTJ/CMOS Circuits Against Power Analysis Attacks.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

Low-Power and Secure Lightweight Cryptography Via TFET-Based Energy Recovery Circuits.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

UTB-SOI based adiabatic computing for low-power and secure IoT devices.
Proceedings of the 12th Annual Conference on Cyber and Information Security Research, 2017

2016
Energy-Efficient and Secure S-Box Circuit Using Symmetric Pass Gate Adiabatic Logic.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

FinSAL: A novel FinFET based Secure Adiabatic Logic for energy-efficient and DPA resistant IoT devices.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

QUALPUF: A Novel Quasi-Adiabatic Logic based Physical Unclonable Function.
Proceedings of the 11th Annual Cyber and Information Security Research Conference, 2016

2015
A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic.
Proceedings of the 28th International Conference on VLSI Design, 2015

A novel adiabatic SRAM cell implementation using split level charge recovery logic.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015


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