S. VenkataKeerthy

Orcid: 0000-0003-1393-7321

Affiliations:
  • Indian Institute of Technology Hyderabad, India


According to our database1, S. VenkataKeerthy authored at least 12 papers between 2018 and 2024.

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Bibliography

2024
The Next 700 ML-Enabled Compiler Optimizations.
Proceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction, 2024

2023
VEXIR2Vec: An Architecture-Neutral Embedding Framework for Binary Similarity.
CoRR, 2023

RL4ReAl: Reinforcement Learning for Register Allocation.
Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction, 2023

2022
RL4ReAl: Reinforcement Learning for Register Allocation.
CoRR, 2022

Reinforcement Learning assisted Loop Distribution for Locality and Vectorization.
Proceedings of the Eighth IEEE/ACM Workshop on the LLVM Compiler Infrastructure in HPC, 2022

POSET-RL: Phase ordering for Optimizing Size and Execution Time using Reinforcement Learning.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

Packet Processing Algorithm Identification using Program Embeddings.
Proceedings of the 6th Asia-Pacific Workshop on Networking, 2022

2020
IR2VEC: LLVM IR Based Scalable Program Embeddings.
ACM Trans. Archit. Code Optim., 2020

2019
Secure Gray code-based reversible data hiding scheme in radiographic images.
Int. J. Electron. Secur. Digit. Forensics, 2019

IR2Vec: A Flow Analysis based Scalable Infrastructure for Program Encodings.
CoRR, 2019

2018
INSTRUCT: A Clustering Based Identification of Valid Communications in IoT Networks.
Proceedings of the 2018 Fifth International Conference on Internet of Things: Systems, 2018

P4LLVM: An LLVM Based P4 Compiler.
Proceedings of the 2018 IEEE 26th International Conference on Network Protocols, 2018


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