Saeed Aghapour

Orcid: 0000-0001-6742-0868

According to our database1, Saeed Aghapour authored at least 19 papers between 2016 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
MAED: Mathematical Activation Error Detection for Mitigating Physical Fault Attacks in DNN Inference.
CoRR, March, 2026

Partial Recomputation Fault Detection Architecture for Multiple-Precision Montgomery Modular Multiplication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026

2025
Corrections to "Efficient Fault-Detection Architectures for Barrett Reduction and Multiplication in Classical and Post-Quantum Cryptographic Systems".
IEEE Trans. Very Large Scale Integr. Syst., December, 2025

Efficient Fault-Detection Architectures for Barrett Reduction and Multiplication in Classical and Post-Quantum Cryptographic Systems.
IEEE Trans. Very Large Scale Integr. Syst., December, 2025

Efficient Algorithm-Level Error Detection for Number-Theoretic Transform Used for Kyber Assessed on FPGAs and ARM.
ACM Trans. Embed. Comput. Syst., September, 2025

Efficient Partial Recomputation-Based Fault Detection Approaches for Z-transform.
IEEE Trans. Very Large Scale Integr. Syst., July, 2025

PUF-Dilithium: Design of a PUF-Based Dilithium Architecture Benchmarked on ARM Processors.
ACM Trans. Embed. Comput. Syst., March, 2025

Lightweight Fault Detection Architecture for Modular Exponentiation in Cryptography on ARM and FPGA.
Proceedings of the Lightweight Cryptography for Security and Privacy, 2025

2024
PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

Efficient Error Detection Cryptographic Architectures Benchmarked on FPGAs for Montgomery Ladder.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024

Efficient Error Detection Schemes for ECSM Window Method Benchmarked on FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., March, 2024

Efficient Algorithm Level Error Detection for Number-Theoretic Transform Assessed on FPGAs.
CoRR, 2024

Efficient Fault Detection Architectures for Modular Exponentiation Targeting Cryptographic Applications Benchmarked on FPGAs.
CoRR, 2024

2023
On the security of 'an ultra-lightweight and secure scheme for communications of smart metres and neighbourhood gateways by utilisation of an ARM Cortex-M microcontroller'.
IET Inf. Secur., May, 2023

Envisioning the Future of Cyber Security in Post-Quantum Era: A Survey on PQ Standardization, Applications, Challenges and Opportunities.
CoRR, 2023

An Efficient Authentication Protocol for Smart Grid Communication Based on On-Chip-Error-Correcting Physical Unclonable Function.
CoRR, 2023

2021
An Ultra-Lightweight Mutual Authentication Scheme for Smart Grid Two-Way Communications.
IEEE Access, 2021

2020
An Ultra-Lightweight and Provably Secure Broadcast Authentication Protocol for Smart Grid Communications.
IEEE Access, 2020

2016
A multi sender attribute-based broadcast authentication scheme.
Proceedings of the 8th International Symposium on Telecommunications, 2016


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