Reza Azarderakhsh

Affiliations:
  • Florida Atlantic University, Boca Raton, FL, USA
  • PQSecure Technologies
  • University of Western Ontario, Canada (former)


According to our database1, Reza Azarderakhsh authored at least 114 papers between 2008 and 2021.

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Bibliography

2021
Cryptographic Accelerators for Digital Signature Based on Ed25519.
IEEE Trans. Very Large Scale Integr. Syst., 2021

CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., 2021

Reliable CRC-Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Error Detection Architectures for Ring Polynomial Multiplication and Modular Reduction of Ring-LWE in $\boldsymbol{\frac{\mathbb{Z}/p\mathbb{Z}[x]}{x^{n}+1}}$ Benchmarked on ASIC.
IEEE Trans. Reliab., 2021

SIKE in 32-bit ARM Processors Based on Redundant Number System for NIST Level-II.
ACM Trans. Embed. Comput. Syst., 2021

Fault Detection Architectures for Inverted Binary Ring-LWE Construction Benchmarked on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Area-Time Efficient Hardware Architecture for Signature Based on Ed448.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Fast Strategies for the Implementation of SIKE Round 3 on ARM Cortex-M4.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Reliable Architectures for Composite-Field-Oriented Constructions of McEliece Post-Quantum Cryptography on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M4.
IEEE Trans. Computers, 2021

No Silver Bullet: Optimized Montgomery Multiplication on Various 64-bit ARM Platforms.
IACR Cryptol. ePrint Arch., 2021

Kyber on ARM64: Compact Implementations of Kyber on 64-bit ARM Cortex-A Processors.
IACR Cryptol. ePrint Arch., 2021

High-Speed NTT-based Polynomial Multiplication Accelerator for CRYSTALS-Kyber Post-Quantum Cryptography.
IACR Cryptol. ePrint Arch., 2021

Accelerated RISC-V for Post-Quantum SIKE.
IACR Cryptol. ePrint Arch., 2021

Hardware Deployment of Hybrid PQC.
IACR Cryptol. ePrint Arch., 2021

A Monolithic Hardware Implementation of Kyber: Comparing Apples to Apples in PQC Candidates.
Proceedings of the Progress in Cryptology - LATINCRYPT 2021, 2021

2020
Optimized Implementation of SIKE Round 2 on 64-bit ARM Cortex-A Processors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

SIKE'd Up: Fast Hardware Architectures for Supersingular Isogeny Key Encapsulation.
IEEE Trans. Circuits Syst., 2020

Efficient Software Implementation of Ring-LWE Encryption on IoT Processors.
IEEE Trans. Computers, 2020

Fast, Small, and Area-Time Efficient Architectures for Key-Exchange on Curve25519.
IACR Cryptol. ePrint Arch., 2020

Optimized Architectures for Elliptic Curve Cryptography over Curve448.
IACR Cryptol. ePrint Arch., 2020

Efficient and Fast Hardware Architectures for SIKE Round 2 on FPGA.
IACR Cryptol. ePrint Arch., 2020

How Not to Create an Isogeny-Based PAKE.
IACR Cryptol. ePrint Arch., 2020

Efficient Hardware Implementations for Elliptic Curve Cryptography over Curve448.
Proceedings of the Progress in Cryptology - INDOCRYPT 2020, 2020

Curve448 on 32-Bit ARM Cortex-M4.
Proceedings of the Information Security and Cryptology - ICISC 2020, 2020

Highly Optimized Montgomery Multiplier for SIKE Primes on FPGA.
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020

2019
Hardware Constructions for Error Detection of Number-Theoretic Transform Utilized in Secure Cryptographic Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Reliable Architecture-Oblivious Error Detection Schemes for Secure Cryptographic GCM Structures.
IEEE Trans. Reliab., 2019

Supersingular Isogeny Diffie-Hellman Key Exchange on 64-Bit ARM.
IEEE Trans. Dependable Secur. Comput., 2019

ARMv8 SIKE: Optimized Supersingular Isogeny Key Encapsulation on ARMv8 Processors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Optimized SIKE Round 2 on 64-bit ARM.
IACR Cryptol. ePrint Arch., 2019

SIKE Round 2 Speed Record on ARM Cortex-M4.
IACR Cryptol. ePrint Arch., 2019

SIKE'd Up: Fast and Secure Hardware Architectures for Supersingular Isogeny Key Encapsulation.
IACR Cryptol. ePrint Arch., 2019

Towards Optimized and Constant-Time CSIDH on Embedded Devices.
IACR Cryptol. ePrint Arch., 2019

Optimized Supersingular Isogeny Key Encapsulation on ARMv8 Processors.
IACR Cryptol. ePrint Arch., 2019

Further Optimizations of CSIDH: A Systematic Approach to Efficient Strategies, Permutations, and Bound Vectors.
IACR Cryptol. ePrint Arch., 2019

Practical Supersingular Isogeny Group Key Agreement.
IACR Cryptol. ePrint Arch., 2019

High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKE.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Improved Digital Signatures Based on Elliptic Curve Endomorphism Rings.
Proceedings of the Information Security Practice and Experience, 2019

Optimized Algorithms and Architectures for Montgomery Multiplication for Post-quantum Cryptography.
Proceedings of the Cryptology and Network Security - 18th International Conference, 2019

2018
Efficient and Reliable Error Detection Architectures of Hash-Counter-Hash Tweakable Enciphering Schemes.
ACM Trans. Embed. Comput. Syst., 2018

Reliable Inversion in GF(2<sup>8</sup>) With Redundant Arithmetic for Secure Error Detection of Cryptographic Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Reliable and Fault Diagnosis Architectures for Hardware and Software-Efficient Block Cipher KLEIN Benchmarked on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A High-Performance and Scalable Hardware Architecture for Isogeny-Based Cryptography.
IEEE Trans. Computers, 2018

Modeling Quantum-Safe Authenticated Key Establishment, and an Isogeny-Based Protocol.
IACR Cryptol. ePrint Arch., 2018

Lightweight Hardware Architectures for Efficient Secure Hash Functions ECHO and Fugue.
CoRR, 2018

Towards Lightweight Error Detection Schemes for Implementations of MixColumns in Lightweight Cryptography.
CoRR, 2018

NEON SIKE: Supersingular Isogeny Key Encapsulation on ARMv7.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018

EdSIDH: Supersingular Isogeny Diffie-Hellman Key Exchange on Edwards Curves.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018

Lightweight Error Detection Architectures through Swapping the Shares for a Subset of S-boxes.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Design-for-Error-Detection in Implementations of Cryptographic Nonlinear Substitution Boxes Benchmarked on ASIC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

An Exposure Model for Supersingular Isogeny Diffie-Hellman Key Exchange.
Proceedings of the Topics in Cryptology - CT-RSA 2018, 2018

Reliable hardware architectures for efficient secure hash functions ECHO and fugue.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

Comparative realization of error detection schemes for implementations of mixcolumns in lightweight cryptography.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017
FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over $GF(2^{m})$ and Their Applications in Trinomial Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Fault Diagnosis Schemes for Low-Energy Block Cipher Midori Benchmarked on FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Fault Detection Architectures for Post-Quantum Cryptographic Stateless Hash-Based Secure Signatures Benchmarked on ASIC.
ACM Trans. Embed. Comput. Syst., 2017

Lightweight Architectures for Reliable and Fault Detection Simon and Speck Cryptographic Algorithms on FPGA.
ACM Trans. Embed. Comput. Syst., 2017

Emerging Embedded and Cyber Physical System Security Challenges and Innovations.
IEEE Trans. Dependable Secur. Comput., 2017

Fast Software Implementations of Bilinear Pairings.
IEEE Trans. Dependable Secur. Comput., 2017

Reliable Hardware Architectures of the CORDIC Algorithm With a Fixed Angle of Rotations.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Reliable Hardware Architectures for Cryptographic Block Ciphers LED and HIGHT.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

A Post-Quantum Digital Signature Scheme Based on Supersingular Isogenies.
IACR Cryptol. ePrint Arch., 2017

Evidence-Based Trust Mechanism Using Clustering Algorithms for Distributed Storage Systems.
IACR Cryptol. ePrint Arch., 2017

Efficient Software Implementation of Laddering Algorithms Over Binary Elliptic Curves.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2017

Side-Channel Attacks on Quantum-Resistant Supersingular Isogeny Diffie-Hellman.
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017

Efficient Post-Quantum Undeniable Signature on 64-Bit ARM.
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017

Post-Quantum Static-Static Key Agreement Using Multiple Protocol Instances.
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017

Evidence-Based Trust Mechanism Using Clustering Algorithms for Distributed Storage Systems (Short Paper).
Proceedings of the 15th Annual Conference on Privacy, Security and Trust, 2017

On secure implementations of quantum-resistant supersingular isogeny Diffie-Hellman.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

2016
Guest Editorial: Introduction to the Special Section on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures.
IEEE ACM Trans. Comput. Biol. Bioinform., 2016

Fast Hardware Architectures for Supersingular Isogeny Diffie-Hellman Key Exchange on FPGA.
IACR Cryptol. ePrint Arch., 2016

On Fast Calculation of Addition Chains for Isogeny-Based Cryptography.
IACR Cryptol. ePrint Arch., 2016

FourQ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields.
IACR Cryptol. ePrint Arch., 2016

NEON-SIDH: Effi cient Implementation of Supersingular Isogeny Diffi e-Hellman Key-Exchange Protocol on ARM.
IACR Cryptol. ePrint Arch., 2016

Key Compression for Isogeny-Based Cryptosystems.
IACR Cryptol. ePrint Arch., 2016

Efficient Implementation of Ring-LWE Encryption on High-End IoT Platform.
Proceedings of the Radio Frequency Identification and IoT Security, 2016

Efficient error detection architectures for CORDIC through recomputing with encoded operands.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Lightweight hardware architectures for fault diagnosis schemes of efficiently-maskable cryptographic substitution boxes.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Error detection reliable architectures of Camellia block cipher applicable to different variants of its substitution boxes.
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016

Efficient Algorithms and Architectures for Double Point Multiplication on Elliptic Curves.
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016

Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016

NEON-SIDH: Efficient Implementation of Supersingular Isogeny Diffie-Hellman Key Exchange Protocol on ARM.
Proceedings of the Cryptology and Network Security - 15th International Conference, 2016

2015
Reliable and Error Detection Architectures of Pomaranch for False-Alarm-Sensitive Cryptographic Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Parallel and High-Speed Computations of Elliptic Curve Cryptography Using Hybrid-Double Multipliers.
IEEE Trans. Parallel Distributed Syst., 2015

Common Subexpression Algorithms for Space-Complexity Reduction of Gaussian Normal Basis Multiplication.
IEEE Trans. Inf. Theory, 2015

Reliable Radix-4 Complex Division for Fault-Sensitive Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Secure and Efficient Architectures for Single Exponentiations in Finite Fields Suitable for High-Performance Cryptographic Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

High-Performance Two-Dimensional Finite Field Multiplication and Exponentiation for Cryptographic Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A Generalization of Addition Chains and Fast Inversions in Binary Fields.
IEEE Trans. Computers, 2015

NEON PQCryto: Fast and Parallel Ring-LWE Encryption on ARM NEON Architecture.
IACR Cryptol. ePrint Arch., 2015

Low-Resource and Fast Binary Edwards Curves Cryptography.
Proceedings of the Progress in Cryptology - INDOCRYPT 2015, 2015

Reliable hash trees for post-quantum stateless cryptographic hash-based signatures.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., 2014

Dual-Basis Superserial Multipliers for Secure Applications and Lightweight Cryptographic Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Low-Latency Digit-Serial Systolic Double Basis Multiplier over $\mbi GF{(2^m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach.
IEEE Trans. Computers, 2014

A New Double Point Multiplication Algorithm and Its Application to Binary Elliptic Curves with Endomorphisms.
IEEE Trans. Computers, 2014

Fast Inversion in ${\schmi{GF(2^m)}}$ with Normal Basis Using Hybrid-Double Multipliers.
IEEE Trans. Computers, 2014

Fault-Resilient Lightweight Cryptographic Block Ciphers for Secure Embedded Systems.
IEEE Embed. Syst. Lett., 2014

2013
Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA.
IEEE Trans. Ind. Electron., 2013

High-Performance Implementation of Point Multiplication on Koblitz Curves.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases.
IEEE Trans. Computers, 2013

A Comparison of Double Point Multiplication Algorithms and their Implementation over Binary Elliptic Curves.
IACR Cryptol. ePrint Arch., 2013

2012
Efficient FPGA Implementations of Point Multiplication on Binary Edwards and Generalized Hessian Curves Using Gaussian Normal Basis.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Efficient Implementation of Bilinear Pairings on ARM Processors.
IACR Cryptol. ePrint Arch., 2012

2011
Secure Clustering and Symmetric Key Establishment in Heterogeneous Wireless Sensor Networks.
EURASIP J. Wirel. Commun. Netw., 2011

2010
A Modified Low Complexity Digit-Level Gaussian Normal Basis Multiplier.
Proceedings of the Arithmetic of Finite Fields, Third International Workshop, 2010

2008
Key Management for Wireless Sensor Networks Using Trusted Neighbors.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

A Key Management Scheme for Cluster Based Wireless Sensor Networks.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008


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