Saihua Lin

According to our database1, Saihua Lin authored at least 9 papers between 2006 and 2009.

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Bibliography

2009
Pi Coil: A New Element for Bandwidth Extension.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

2008
A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2008

A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
A Novel gamma d/n, RLCG Transmission Line Model Considering Complex RC(L) Loads.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Worst Case Crosstalk Noise Effect Analysis in DSM Circuits by ABCD Modeling.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006


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