Sairam Sri Vatsavai

According to our database, Sairam Sri Vatsavai authored at least 14 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Low-Dissipation and Scalable GEMM Accelerator with Silicon Nitride Photonics.

Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Oluwaseun Adewunmi Alo, Jeffrey Todd Hastings, Justin Scott Woods

CoRR, 2024

HEANA: A Hybrid Time-Amplitude Analog Optical Accelerator with Flexible Dataflows for Energy-Efficient CNN Inference.

Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar

CoRR, 2024

A Comparative Analysis of Microrings Based Incoherent Photonic GEMM Accelerators.

Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Oluwaseun Adewunmi Alo, Ishan G. Thakkar

CoRR, 2024

2023

A Bit-Parallel Deterministic Stochastic Multiplier.

Sairam Sri Vatsavai, Ishan G. Thakkar

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks.

Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning.

Supreeth Mysore Shivanandamurthy, Sairam Sri Vatsavai, Ishan G. Thakkar, Sayed Ahmad Salehi

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits.

Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Jeffrey Todd Hastings

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

SCONNA: A Stochastic Computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs.

Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar, Sayed Ahmad Salehi, Jeffrey Todd Hastings

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures.

Ishan G. Thakkar, Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022

Photonic Reconfigurable Accelerators for Efficient Inference of CNNs With Mixed-Sized Tensors.

Sairam Sri Vatsavai, Ishan G. Thakkar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Exploiting Process Variations to Secure Photonic NoC Architectures From Snooping Attacks.

Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha, Sairam Sri Vatsavai, Varun Bhat

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Silicon Photonic Microring Based Chip-Scale Accelerator for Delayed Feedback Reservoir Computing.

Sairam Sri Vatsavai, Ishan G. Thakkar

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2020

PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance.

Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar

Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020

Redesigning Photonic Interconnects with Silicon-on-Sapphire Device Platform for Ultra-Low-Energy On-Chip Communication.

Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020