Sudeep Pasricha
Orcid: 0000-0002-0846-0066
According to our database1,
Sudeep Pasricha
authored at least 253 papers
between 2003 and 2024.
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Bibliography
2024
IEEE Des. Test, February, 2024
Silicon Photonic 2.5D Interposer Networks for Overcoming Communication Bottlenecks in Scale-out Machine Learning Hardware Accelerators.
CoRR, 2024
SANGRIA: Stacked Autoencoder Neural Networks with Gradient Boosting for Indoor Localization.
CoRR, 2024
Accelerating Neural Networks for Large Language Models and Graph Processing with Silicon Photonics.
CoRR, 2024
2023
A Reinforcement Learning Framework With Region-Awareness and Shared Path Experience for Efficient Routing in Networks-on-Chip.
IEEE Des. Test, December, 2023
FedHIL: Heterogeneity Resilient Federated Learning for Robust Indoor Localization with Mobile Devices.
ACM Trans. Embed. Comput. Syst., October, 2023
ACM Trans. Embed. Comput. Syst., October, 2023
Surveillance mission scheduling with unmanned aerial vehicles in dynamic heterogeneous environments.
J. Supercomput., August, 2023
Computer, July, 2023
IEEE Trans. Sustain. Comput., 2023
STELLAR: Siamese Multi-Headed Attention Neural Networks for Overcoming Temporal Variations and Device Heterogeneity with Indoor Localization.
CoRR, 2023
CoRR, 2023
CoRR, 2023
CoRR, 2023
SHIELD: Sustainable Hybrid Evolutionary Learning Framework for Carbon, Wastewater, and Energy-Aware Data Center Management.
CoRR, 2023
Analysis of Optical Loss and Crosstalk Noise in MZI-based Coherent Photonic Neural Networks.
CoRR, 2023
IEEE Access, 2023
TRINE: A Tree-Based Silicon Photonic Interposer Network for Energy-Efficient 2.5D Machine Learning Acceleration.
Proceedings of the 16th International Workshop on Network on Chip Architectures, 2023
Energy-Efficient Machine Learning Acceleration: From Technologies to Circuits and Systems.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
MOSAIC: A Multi-Objective Optimization Framework for Sustainable Datacenter Management.
Proceedings of the 30th IEEE International Conference on High Performance Computing, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
MOELA: A Multi-Objective Evolutionary/Learning Design Space Exploration Framework for 3D Heterogeneous Manycore Platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Lightning Talk: Efficient Embedded Machine Learning Deployment on Edge and IoT Devices.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
VITAL: Vision Transformer Neural Networks for Accurate Smartphone Heterogeneity Resilient Indoor Localization.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
2022
Energy and Network Aware Workload Management for Geographically Distributed Data Centers.
IEEE Trans. Sustain. Comput., 2022
Silicon Photonic Microring Resonators: A Comprehensive Design-Space Exploration and Optimization Under Fabrication-Process Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion.
IEEE Micro, 2022
Photonic Networks-on-Chip Employing Multilevel Signaling: A Cross-Layer Comparative Study.
ACM J. Emerg. Technol. Comput. Syst., 2022
CHISEL: Compression-Aware High-Accuracy Embedded Indoor Localization With Deep Learning.
IEEE Embed. Syst. Lett., 2022
IEEE Embed. Syst. Lett., 2022
Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures.
IEEE Des. Test, 2022
CoRR, 2022
CoRR, 2022
Characterization and Optimization of Integrated Silicon-Photonic Neural Networks under Fabrication-Process Variations.
CoRR, 2022
CHAMP: Coherent Hardware-Aware Magnitude Pruning of Integrated Photonic Neural Networks.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
EDAML 2022 Invited Speaker 10: Hardware/Software Codesign for Optical Deep Learning Accelerators.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
A Silicon Photonic Accelerator for Convolutional Neural Networks with Heterogeneous Quantization.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise in Integrated Silicon-Photonic Neural Networks.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Embedded Systems Education in the 2020s: Challenges, Reflections, and Future Directions.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
RACE: A Reinforcement Learning Framework for Improved Adaptive Control of NoC Channel Buffers.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Co-Optimizing Sensing and Deep Machine Learning in Automotive Cyber-Physical Systems.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
DeFT: A Deadlock-Free and Fault-Tolerant Routing Algorithm for 2.5D Chiplet Networks.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
TENET: Temporal CNN with Attention for Anomaly Detection in Automotive Cyber-Physical Systems.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
SONIC: A Sparse Neural Network Inference Accelerator with Silicon Photonics for Energy-Efficient Deep Learning.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
ACM Trans. Embed. Comput. Syst., 2021
LATTE: LSTM Self-Attention based Anomaly Detection in E mbedded Automotive Platforms.
ACM Trans. Embed. Comput. Syst., 2021
ACM Trans. Cyber Phys. Syst., 2021
Exploiting Process Variations to Secure Photonic NoC Architectures From Snooping Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
ACM J. Emerg. Technol. Comput. Syst., 2021
ACM J. Emerg. Technol. Comput. Syst., 2021
CoRR, 2021
VESPA: A Framework for Optimizing Heterogeneous Sensor Placement and Orientation for Autonomous Vehicles.
IEEE Consumer Electron. Mag., 2021
Proceedings of the 8th NSysS 2021: 8th International Conference on Networking, Systems and Security, Cox's Bazar, Bangladesh, December 21, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
IEEE Trans. Veh. Technol., 2020
IEEE Trans. Parallel Distributed Syst., 2020
Overcoming Security Vulnerabilities in Deep Learning-based Indoor Localization Frameworks on Mobile Devices.
ACM Trans. Embed. Comput. Syst., 2020
INDRA: Intrusion Detection Using Recurrent Autoencoders in Automotive Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
A Hidden Markov Model based smartphone heterogeneity resilient portable indoor localization framework.
J. Syst. Archit., 2020
IEEE Des. Test, 2020
Guest Editors' Introduction: Design and Management of Mobile Platforms: From Smartphones to Wearable Devices.
IEEE Des. Test, 2020
A Survey of Resource Management for Processing-in-Memory and Near-Memory Processing Architectures.
CoRR, 2020
LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Silicon Photonic Microring Resonators: Design Optimization Under Fabrication Non-Uniformity.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Opportunities for Cross-Layer Design in High-Performance Computing Systems with Integrated Silicon Photonic Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
JAMS-SG: A Framework for Jitter-Aware Message Scheduling for Time-Triggered Automotive Networks.
ACM Trans. Design Autom. Electr. Syst., 2019
Utility-based resource management in an oversubscribed energy-constrained heterogeneous environment executing parallel applications.
Parallel Comput., 2019
Guest Editors' Introduction: Emerging Networks-on-Chip Designs, Technologies, and Applications.
ACM J. Emerg. Technol. Comput. Syst., 2019
IEEE Des. Test, 2019
Mobile Network-Aware Middleware Framework for Cloud Offloading: Using Reinforcement Learning to Make Reward-Based Decisions in Smartphone Applications.
IEEE Consumer Electron. Mag., 2019
Proceedings of the Mobile Computing, Applications, and Services, 2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
SHERPA: A Lightweight Smartphone Heterogeneity Resilient Portable Indoor Localization Framework.
Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019
SLAM: High Performance and Energy Efficient Hybrid Last Level Cache Architecture for Multicore Embedded Systems.
Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
HYDRA: Heterodyne Crosstalk Mitigation With Double Microring Resonators and Data Encoding for Photonic NoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Sustain. Comput., 2018
IEEE Trans. Sustain. Comput., 2018
IEEE Trans. Sustain. Comput., 2018
BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures.
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Trans. Multi Scale Comput. Syst., 2018
LIBRA: Thermal and Process Variation Aware Reliability Management in Photonic Networks-on-Chip.
IEEE Trans. Multi Scale Comput. Syst., 2018
DyPhase: A Dynamic Phase Change Memory Architecture With Symmetric Write Latency and Restorable Endurance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Rate-based thermal, power, and co-location aware resource management for heterogeneous data centers.
J. Parallel Distributed Comput., 2018
Mixed-criticality scheduling on heterogeneous multicore systems powered by energy harvesting.
Integr., 2018
IEEE Consumer Electron. Mag., 2018
Special session on overcoming reliability and energy-efficiency challenges with silicon photonics for future manycore computing.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Overcoming Energy and Reliability Challenges for IoT and Mobile Devices with Data Analytics.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
Mitigating the Energy Impacts of VBTI Aging in Photonic Networks-on-Chip Architectures with Multilevel Signaling.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
PARM: power supply noise aware resource management for NoC based multicore systems in the dark silicon era.
Proceedings of the 55th Annual Design Automation Conference, 2018
SOTERIA: exploiting process variations to enhance hardware security with photonic NoC architectures.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
A Runtime Framework for Robust Application Scheduling With Adaptive Parallelism in the Dark-Silicon Era.
IEEE Trans. Very Large Scale Integr. Syst., 2017
ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-Based Chip Multiprocessors.
IEEE Trans. Multi Scale Comput. Syst., 2017
Reliab. Eng. Syst. Saf., 2017
SWIFTNoC: A Reconfigurable Silicon-Photonic Network with Multicast-Enabled Channel Sharing for Multicore Architectures.
ACM J. Emerg. Technol. Comput. Syst., 2017
IEEE Consumer Electron. Mag., 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Analyzing voltage bias and temperature induced aging effects in photonic interconnects for manycore computing.
Proceedings of the ACM/IEEE 2017 International Workshop on System Level Interconnect Prediction, 2017
Proceedings of the International Symposium on Rapid System Prototyping, 2017
Improving the Reliability and Energy-Efficiency of High-Bandwidth Photonic NoC Architectures with Multilevel Signaling.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
Preemptive Resource Management for Dynamically Arriving Tasks in an Oversubscribed Heterogeneous Computing System.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Data analytics enables energy-efficiency and robustness: from mobile to manycores, datacenters, and networks (special session paper).
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
A System-Level Cosynthesis Framework for Power Delivery and On-Chip Data Networks in Application-Specific 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2016
J. Supercomput., 2016
Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
SPECTRA: A Framework for Thermal Reliability Management in Silicon-Photonic Networks-on-Chip.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
A Comparative Analysis of Front-End and Back-End Compatible Silicon Photonic On-Chip Interconnects.
Proceedings of the 18th System Level Interconnect Prediction Workshop, 2016
Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers.
Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Process variation aware crosstalk mitigation for DWDM based photonic NoC architectures.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Dynamic Resource Management for Parallel Tasks in an Oversubscribed Energy-Constrained Heterogeneous Environment.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016
CHARM: A checkpoint-based resource management framework for reliable multicore computing in the dark silicon era.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Online Resource Management in Thermal and Energy Constrained Heterogeneous High Performance Computing.
Proceedings of the 2016 IEEE 14th Intl Conf on Dependable, 2016
PICO: mitigating heterodyne crosstalk due to process variations and intermodulation effects in photonic NoCs.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Mitigation of homodyne crosstalk noise in silicon photonic NoC architectures with tunable decoupling.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
A Performance and Energy Comparison of Fault Tolerance Techniques for Exascale Computing Systems.
Proceedings of the 2016 IEEE International Conference on Computer and Information Technology, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Makespan and Energy Robust Stochastic Static Resource Allocation of a Bag-of-Tasks to a Heterogeneous Computing System.
IEEE Trans. Parallel Distributed Syst., 2015
Soft and Hard Reliability-Aware Scheduling for Multicore Embedded Systems with Energy Harvesting.
IEEE Trans. Multi Scale Comput. Syst., 2015
3D-ProWiz: An Energy-Efficient and Optically-Interfaced 3D DRAM Architecture with Reduced Data Access Overhead.
IEEE Trans. Multi Scale Comput. Syst., 2015
IEEE Trans. Computers, 2015
Utility maximizing dynamic resource management in an oversubscribed energy-constrained heterogeneous computing system.
Sustain. Comput. Informatics Syst., 2015
A middleware framework for application-aware and user-specific energy optimization in smart mobile devices.
Pervasive Mob. Comput., 2015
IEEE Des. Test, 2015
IEEE Des. Test, 2015
Process variation aware dynamic power management in multicore systems with extended range voltage/frequency scaling.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Improving crosstalk resilience with wavelength spacing in photonic crossbar-based network-on-chip architectures.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
A Methodology for Co-Location Aware Application Performance Modeling in Multicore Computing.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
A novel 3D graphics DRAM architecture for high-performance and low-energy memory accesses.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Reconfigurable Silicon-Photonic Network with Improved Channel Sharing for Multicore Architectures.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
VARSHA: variation and reliability-aware application scheduling with adaptive parallelism in the dark-silicon era.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
2014
IEEE Trans. Mob. Comput., 2014
ACM Trans. Embed. Comput. Syst., 2014
Silicon Nanophotonics for Future Multicore Architectures: Opportunities and Challenges.
IEEE Des. Test, 2014
NoC Scheduling for Improved Application-Aware and Memory-Aware Transfers in Multi-core Systems.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
An application-aware heterogeneous prioritization framework for NoC based chip multiprocessors.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
HELIX: Design and synthesis of hybrid nanophotonic application-specific network-on-chip architectures.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Utility Driven Dynamic Resource Management in an Oversubscribed Energy-Constrained Heterogeneous System.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014
3D-Wiz: A novel high bandwidth, optically interfaced 3D DRAM architecture with reduced random access time.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
PRATHAM: A power delivery-aware and thermal-aware mapping framework for parallel embedded applications on 3D MPSoCs.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Proceedings of the Seventh International Conference on Contemporary Computing, 2014
Thermal, power, and co-location aware resource allocation in heterogeneous high performance computing systems.
Proceedings of the International Green Computing Conference, 2014
A hybrid framework for application allocation and scheduling in multicore systems with energy harvesting.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
HEFT: A hybrid system-level framework for enabling energy-efficient fault-tolerance in NoC based MPSoCs.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
Fault-aware application scheduling in low-power embedded systems with energy harvesting.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
2013
Deadline and energy constrained dynamic resource allocation in a heterogeneous computing environment.
J. Supercomput., 2013
ACM Trans. Embed. Comput. Syst., 2013
Proceedings of the Parallel Processing and Applied Mathematics, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Thermal-aware semi-dynamic power management for multicore systems with energy harvesting.
Proceedings of the International Symposium on Quality Electronic Design, 2013
VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands.
Proceedings of the International Symposium on Quality Electronic Design, 2013
A co-synthesis methodology for power delivery and data interconnection networks in 3D ICs.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Harvesting-aware energy management for multicore platforms with hybrid energy storage.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
2012
A framework for low power synthesis of interconnection networks-on-chip with multiple voltage islands.
Integr., 2012
IEEE Embed. Syst. Lett., 2012
A Framework for TSV Serialization-aware Synthesis of Application Specific 3D Networks-on-Chip.
Proceedings of the 25th International Conference on VLSI Design, 2012
A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands.
Proceedings of the 25th International Conference on VLSI Design, 2012
A Particle Swarm Optimization approach for synthesizing application-specific hybrid photonic networks-on-chip.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Thermal-Aware Performance Optimization in Power Constrained Heterogenous Data Centers.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
Exploiting spatiotemporal and device contexts for energy-efficient mobile embedded systems.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
POSEIDON: A framework for application-specific Network-on-Chip synthesis for heterogeneous chip multiprocessors.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Energy-Constrained Dynamic Resource Allocation in a Heterogeneous Computing Environment.
Proceedings of the 2011 International Conference on Parallel Processing Workshops, 2011
Analysis of on-chip interconnection network interface reliability in multicore systems.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
AURA: An application and user interaction aware middleware framework for energy optimization in mobile devices.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
NS-FTR: A fault tolerant routing scheme for networks on chip with permanent and runtime intermittent faults.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Stochastically robust static resource allocation for energy minimization with a makespan constraint in a heterogeneous computing environment.
Proceedings of the 9th IEEE/ACS International Conference on Computer Systems and Applications, 2011
2010
CAPPS: A Framework for Power-Performance Tradeoffs in Bus-Matrix-Based On-Chip Communication Architecture Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Evaluating Carbon Nanotube Global Interconnects for Chip Multiprocessor Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Embed. Syst. Lett., 2010
UC-PHOTON: A novel hybrid photonic network-on-chip for multiple use-case applications.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
2009
System-level PVT variation-aware power exploration of on-chip communication architectures.
ACM Trans. Design Autom. Electr. Syst., 2009
Cross-abstraction Functional Verification and Performance Analysis of Chip Multiprocessor Designs.
IEEE Trans. Ind. Informatics, 2009
Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations.
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009
Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications.
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
ACM Trans. Embed. Comput. Syst., 2008
IPSJ Trans. Syst. LSI Des. Methodol., 2008
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
System level performance analysis of carbon nanotube global interconnects for emerging chip multiprocessors.
Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures, 2008
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors.
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008
Compiler driven data layout optimization for regular/irregular array access patterns.
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008
Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2008
Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency.
Proceedings of the 45th Design Automation Conference, 2008
Methodology for multi-granularity embedded processor power model generation for an ESL design flow.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008
ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Enabling heterogeneous cycle-based and event-driven simulation in a design flow integrated using the SPIRIT consortium specifications.
Des. Autom. Embed. Syst., 2007
Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
System level power estimation methodology with H.264 decoder prediction IP case study.
Proceedings of the 25th International Conference on Computer Design, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Proceedings of the 6th ACM & IEEE International conference on Embedded software, 2006
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
System-level power-performance trade-offs in bus matrix communication architecture synthesis.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
2004
IEEE Des. Test Comput., 2004
Extending the transaction level modeling approach for fast communication architecture exploration.
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
2003
Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Reducing Backlight Power Consumption for Streaming Video Applications on Mobile Handheld Devices.
Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003