Sakkarapani Balagopal

According to our database1, Sakkarapani Balagopal authored at least 7 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2015
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

2013
Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Systematic synthesis of cascaded continuous-time ΔΣ ADCs for wideband data conversion.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Design of wideband continuous-time ΔΣ ADCs using two-step quantizers.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011
Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011


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