Sanjeev Tannirkulam Chandrasekaran

Orcid: 0000-0002-2162-7676

According to our database1, Sanjeev Tannirkulam Chandrasekaran authored at least 21 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Real-Time Hardware-Based Malware and Micro-Architectural Attack Detection Utilizing CMOS Reservoir Computing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

OTA-Free 1-1 MASH ADC Using Fully Passive Noise-Shaping SAR & VCO ADC.
IEEE J. Solid State Circuits, 2022

2021
Fully Integrated Analog Machine Learning Classifier Using Custom Activation Function for Low Resolution Image Classification.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Toward Real-Time, At-Home Patient Health Monitoring Using Reservoir Computing CMOS IC.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

33-200Mbps, 3pJ/Bit True Random Number Generator Based on CT Delta-Sigma Modulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

7.5nJ/inference CMOS Echo State Network for Coronary Heart Disease prediction.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

Temporal-Coded Deep Spiking Neural Network with Easy Training and Robust Performance.
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020
Unified Analog PUF and TRNG Based on Current-Steering DAC and VCO.
IEEE Trans. Very Large Scale Integr. Syst., 2020

76-dB DR, 48 fJ/Step Second-Order VCO-Based Current-to-Digital Converter.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

8fJ/Step Bandpass ADC With Digitally Assisted NTF Re-Configuration.
IEEE Trans. Circuits Syst., 2020

Neural Networks for Authenticating Integrated Circuits Based on Intrinsic Nonlinearity.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Stochastic ΔΣ VCO-ADC Utilizing 4× Staggered Averaging.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Highly Digital Second-Order $\Delta\Sigma$ VCO ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Maximum Likelihood Estimation-Based SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Highly Digital CCO-Based Asynchronous Analog-to-Time Converter.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Single Channel Bandpass SAR ADC with Digitally Assisted NTF Re-configuration.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

0.43nJ, 0.48pJ/step Second-Order ΔΣ Current-to-Digital Converter for IoT Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Ultra-Low Power Analog Multiplier Based on Translinear Principle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Digital PLL Based 2<sup>nd</sup>-Order Δ∑ Bandpass Time-Interleaved ADC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Ring Oscillator Based Delta-Sigma ADCs.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
2<sup>nd</sup>-Order VCO-based CT ΔΣ ADC architecture.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017


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