Kanad Basu

According to our database, Kanad Basu authored at least 99 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services.

Chao Lu, Esha Telang, Aydin Aysu, Kanad Basu

CoRR, 2024

Hardware-based Detection of Malicious Firmware Modification in Microgrids.

Amisha Srivastava, Sneha Thakur, Abraham Peedikayil Kuruvila, Poras T. Balsara, Kanad Basu

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

Defense Against On-Chip Trojans Enabling Traffic Analysis Attacks Based on Machine Learning and Data Augmentation.

Abhijitt Dhavlle, M. Meraj Ahmed, Naseef Mansoor, Kanad Basu, Amlan Ganguly, Sai Manoj Pudukotai Dinakarrao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Circuit Topology-Aware Vaccination-Based Hardware Trojan Detection.

Rakibul Hassan, Xingyu Meng, Kanad Basu, Sai Manoj Pudukotai Dinakarrao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

Trouble-Shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Fei Su, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Computers, August, 2023

SeqL+: Secure Scan-Obfuscation With Theoretical and Empirical Validation.

Seetal Potluri, Shamik Kundu, Akash Kumar, Kanad Basu, Aydin Aysu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators.

Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

IEEE Des. Test, April, 2023

SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics.

Xingyu Meng, Kshitij Raj, Sandip Ray, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans.

Xingyu Meng, Abhrajit Sengupta, Kanad Basu

IACR Cryptol. ePrint Arch., 2023

SCAR: Power Side-Channel Analysis at RTL-Level.

Amisha Srivastava, Sanjay Das, Navnil Choudhury, Rafail Psiakis, Pedro Henrique Silva, Debjit Pal, Kanad Basu

CoRR, 2023

QuBEC: Boosting Equivalence Checking for Quantum Circuits with QEC Embedding.

Chao Lu, Navnil Choudhury, Utsav Banerjee, Abdullah Ash-Saki, Kanad Basu

CoRR, 2023

Unlocking Hardware Security Assurance: The Potential of LLMs.

Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu

CoRR, 2023

Bottlenecks in Secure Adoption of Deep Neural Networks in Safety-Critical Applications.

Sanjay Das, Shamik Kundu, Kanad Basu

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits.

Ayush Arunachalam, Sanjay Das, Monikka Rajan, Fei Su, Xiankun Jin, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

Proceedings of the IEEE International Test Conference, 2023

Application Profiling Using Register-Instruction Hardware Performance Counters.

Anand Menon, Amisha Srivastava, Shamik Kundu, Kanad Basu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

Search Space Reduction for Efficient Quantum Compilation.

Amisha Srivastava, Chao Lu, Navnil Choudhury, Ayush Arunachalam, Kanad Basu

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Towards High-Level Synthesis of Quantum Circuits.

Chao Lu, Christian Pilato, Kanad Basu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

PolyWorm: Leveraging Polymorphic Behavior to Implant Hardware Trojans.

Nimisha Limaye, Nikhil Rangarajan, Satwik Patnaik, Ozgur Sinanoglu, Kanad Basu

IEEE Trans. Emerg. Top. Comput., 2022

Real-Time Hardware-Based Malware and Micro-Architectural Attack Detection Utilizing CMOS Reservoir Computing.

Sanjeev Tannirkulam Chandrasekaran, Abraham Peedikayil Kuruvila, Kanad Basu, Arindam Sanyal

IEEE Trans. Circuits Syst. II Express Briefs, 2022

RTL-ConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities.

Xingyu Meng, Shamik Kundu, Arun K. Kanuparthi, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Explainable Machine Learning for Intrusion Detection via Hardware Performance Counters.

Abraham Peedikayil Kuruvila, Xingyu Meng, Shamik Kundu, Gaurav Pandey, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Runtime Malware Detection Using Embedded Trace Buffers.

Rana Elnaggar, Kanad Basu, Krishnendu Chakrabarty, Ramesh Karri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Security Analysis of Circuit Clock Obfuscation.

Rajesh Datta, Guangwei Zhao, Kanad Basu, Kaveh Shamsi

Cryptogr., 2022

Machine Learning-enhanced Efficient Spectroscopic Ellipsometry Modeling.

Ayush Arunachalam, S. Novia Berriel, Parag Banerjee, Kanad Basu

CoRR, 2022

Special Session: Effective In-field Testing of Deep Neural Network Hardware Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Kanad Basu

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

RIBoNN: Designing Robust In-Memory Binary Neural Network Accelerators.

Shamik Kundu, Akul Malhotra, Arnab Raha, Sumeet Kumar Gupta, Kanad Basu

Proceedings of the IEEE International Test Conference, 2022

Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs.

Ayush Arunachalam, Athulya Kizhakkayil, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Robert Jin, Fei Su, Kanad Basu

Proceedings of the IEEE International Test Conference, 2022

Fault Resilience of DNN Accelerators for Compressed Sensor Inputs.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Kanad Basu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Design and Logic Synthesis of a Scalable, Efficient Quantum Number Theoretic Transform.

Chao Lu, Shamik Kundu, Abraham Peedikayil Kuruvila, Supriya Margabandhu Ravichandran, Kanad Basu

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

Detecting Functional Safety Violations in Online AI Accelerators.

Shamik Kundu, Kanad Basu

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

Design and Analysis of a Scalable and Efficient Quantum Circuit for LWE Matrix Arithmetic.

Chao Lu, Utsav Banerjee, Kanad Basu

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

A Semi-formal Information Flow Validation for Analyzing Secret Asset Propagation in COTS IC Integrated Systems.

Xingyu Meng, Mahmudul Hasan, Kanad Basu, Tamzidul Hoque

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Very Large Scale Integr. Syst., 2021

Hardware Performance Counters: Ready-Made vs Tailor-Made.

Abraham Peedikayil Kuruvila, Anushree Mahapatra, Ramesh Karri, Kanad Basu

ACM Trans. Embed. Comput. Syst., 2021

WiND: An Efficient Post-Silicon Debug Strategy for Network on Chip.

Sidhartha Sankar Rout, Sujay Deb, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Defending Hardware-Based Malware Detectors Against Adversarial Attacks.

Abraham Peedikayil Kuruvila, Shamik Kundu, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

SoCCAR: Detecting System-on-Chip Security Violations Under Asynchronous Resets.

Xingyu Meng, Kshitij Raj, Atul Prasad Deb Nath, Kanad Basu, Sandip Ray

IACR Cryptol. ePrint Arch., 2021

Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security.

Wenye Liu, Chip-Hong Chang, Xueyang Wang, Chen Liu, Jason M. Fung, Mohammad Ebrahimabadi, Naghmeh Karimi, Xingyu Meng, Kanad Basu

IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

Hardware Security in Emerging Technologies: Vulnerabilities, Attacks, and Solutions.

Naghmeh Karimi, Kanad Basu, Chip-Hong Chang, Jason M. Fung

IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

Special Session: Reliability Analysis for ML/AI Hardware.

Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin

CoRR, 2021

Special Session: Reliability Analysis for AI/ML Hardware.

Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

Efficient Hierarchical Post-Silicon Validation and Debug.

Pandy Kalimuthu, Kanad Basu, Benjamin Carrión Schäfer

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Exploring Fault-Energy Trade-offs in Approximate DNN Hardware Accelerators.

Ayesha Siddique, Kanad Basu, Khaza Anuarul Hoque

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Application of Machine Learning in Hardware Trojan Detection.

Shamik Kundu, Xingyu Meng, Kanad Basu

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Can Overclocking Detect Hardware Trojans?

Xingyu Meng, Rakibul Hassan, Sai Manoj Pudukotai Dinakarrao, Kanad Basu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

What Can a Remote Access Hardware Trojan do to a Network-on-Chip?

M. Meraj Ahmed, Abhijitt Dhavlle, Naseef Mansoor, Sai Manoj Pudukotai Dinakarrao, Kanad Basu, Amlan Ganguly

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Ultra-efficient Look-up Table based Programmable Processing in Memory Architecture for Data Encryption.

Purab Ranjan Sutradhar, Kanad Basu, Sai Manoj Pudukotai Dinakarrao, Amlan Ganguly

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Time Series-Based Malware Detection Using Hardware Performance Counters.

Abraham Peedikayil Kuruvila, Sayar Karmakar, Kanad Basu

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Hardware-assisted Detection of Malware in Automotive-Based Systems.

Yugpratap Singh, Abraham Peedikayil Kuruvila, Kanad Basu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Secure Logic Locking with Strain-Protected Nanomagnet Logic.

Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

A Methodology to Capture Fine-Grained Internal Visibility During Multisession Silicon Debug.

Binod Kumar, Jay Adhaduk, Kanad Basu, Masahiro Fujita, Virendra Singh

IEEE Trans. Very Large Scale Integr. Syst., 2020

A Theoretical Study of Hardware Performance Counters-Based Malware Detection.

Kanad Basu, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri

IEEE Trans. Inf. Forensics Secur., 2020

COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity.

Kanad Basu, Suha Sabi Hussain, Ujjwal Gupta, Ramesh Karri

IEEE Trans. Inf. Forensics Secur., 2020

Post-Silicon Gate-Level Error Localization With Effective and Combined Trace Signal Selection.

Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Security Assessment of Interposer-based Chiplet Integration.

Mohammed Shayan, Kanad Basu, Ramesh Karri

CoRR, 2020

Hardware-Assisted Detection of Firmware Attacks in Inverter-Based Cyberphysical Microgrids.

Abraham Peedikayil Kuruvila, Ioannis Zografopoulos, Kanad Basu, Charalambos Konstantinou

CoRR, 2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking.

Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks

CoRR, 2020

Hardware Trojan Detection Using Controlled Circuit Aging.

Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch, Kanad Basu, Jörg Henkel, Ramesh Karri, Farshad Khorrami

IEEE Access, 2020

Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography.

Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

A Low Overhead Methodology for Validating Memory Consistency Models in Chip Multiprocessors.

Binod Kumar, Swapniel Thakur, Kanad Basu, Masahiro Fujita, Virendra Singh

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

Analyzing the Efficiency of Machine Learning Classifiers in Hardware-Based Malware Detectors.

Abraham Peedikayil Kuruvila, Shamik Kundu, Kanad Basu

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

High-level Modeling of Manufacturing Faults in Deep Neural Network Accelerators.

Shamik Kundu, Ahmet Soyyigit, Khaza Anuarul Hoque, Kanad Basu

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

ND-HMDs: Non-Differentiable Hardware Malware Detectors against Evasive Transient Execution Attacks.

Md. Shohidul Islam, Abraham Peedikayil Kuruvila, Kanad Basu, Khaled N. Khasawneh

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Defense Against on-Chip Trojans Enabling Traffic Analysis Attacks.

M. Meraj Ahmed, Abhijitt Dhavlle, Naseef Mansoor, Purab Ranjan Sutradhar, Sai Manoj Pudukotai Dinakarrao, Kanad Basu, Amlan Ganguly

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

2019

Black-Hat High-Level Synthesis: Myth or Reality?

Christian Pilato, Kanad Basu, Francesco Regazzoni, Ramesh Karri

IEEE Trans. Very Large Scale Integr. Syst., 2019

CAD-Base: An Attack Vector into the Electronics Supply Chain.

Kanad Basu, Samah Mohamed Saeed, Christian Pilato, Mohammed Ashraf, Mohammed Thari Nabeel, Krishnendu Chakrabarty, Ramesh Karri

ACM Trans. Design Autom. Electr. Syst., 2019

NIST Post-Quantum Cryptography- A Hardware Evaluation Study.

Kanad Basu, Deepraj Soni, Mohammed Nabeel, Ramesh Karri

IACR Cryptol. ePrint Arch., 2019

Guest Editorial.

Kanad Basu, Mingsong Chen, Rubin A. Parekhji

J. Electron. Test., 2019

Fault-Tolerant Systolic Array Based Accelerators for Deep Neural Network Execution.

Jeff Jun Zhang, Kanad Basu, Siddharth Garg

IEEE Des. Test, 2019

Hardware Trojans Inspired IP Watermarks.

Mohammed Shayan, Kanad Basu, Ramesh Karri

IEEE Des. Test, 2019

Efficient Post-Silicon Validation of Network-on-Chip Using Wireless Links.

Sidhartha Sankar Rout, Kanad Basu, Sujay Deb

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow.

Deepraj Soni, Mohammed Nabeel, Kanad Basu, Ramesh Karri

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

High-Level Synthesis of Benevolent Trojans.

Christian Pilato, Kanad Basu, Mohammed Shayan, Francesco Regazzoni, Ramesh Karri

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

PREEMPT: PReempting Malware by Examining Embedded Processor Traces.

Kanad Basu, Rana Elnaggar, Krishnendu Chakrabarty, Ramesh Karri

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Can Monitoring System State + Counting Custom Instruction Sequences Aid Malware Detection?

Aditya Rohan, Kanad Basu, Ramesh Karri

Proceedings of the 28th IEEE Asian Test Symposium, 2019

2018

Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator.

Jeff Jun Zhang, Tianyu Gu, Kanad Basu, Siddharth Garg

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Special session on intelligent sensor nodes.

Kanad Basu, Shreyas Sen

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis.

Ankit Jindal, Binod Kumar, Kanad Basu, Masahiro Fujita

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Abetting Planned Obsolescence by Aging 3D Networks-on-Chip.

Sourav Das, Kanad Basu, Janardhan Rao Doppa, Partha Pratim Pande, Ramesh Karri, Krishnendu Chakrabarty

Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

A Technique for Electrical Error Localization with Learning Methods During Post-silicon Debugging.

Binod Kumar, Kanad Basu, Virendra Singh

Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

2017

Improving post-silicon error detection with topological selection of trace signals.

Binod Kumar, Kanad Basu, Ankit Jindal, Masahiro Fujita, Virendra Singh

Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

Deterministic Shift Power Reduction in Test Compression.

Kanad Basu, Rishi Kumar, Santosh Kulkarni, Rohit Kapur

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

A Formal Perspective on Effective Post-silicon Debug and Trace Signal Selection.

Binod Kumar, Kanad Basu, Ankit Jindal, Brajesh Pandey, Masahiro Fujita

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

RTL level trace signal selection and coverage estimation during post-silicon validation.

Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh

Proceedings of the 2017 IEEE International High Level Design Validation and Test Workshop, 2017

2016

Post-Silicon Validation and Diagnosis.

Kanad Basu, Subhadip Kundu

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2013

RATS: Restoration-Aware Trace Signal Selection for Post-Silicon Validation.

Kanad Basu, Prabhat Mishra

IEEE Trans. Very Large Scale Integr. Syst., 2013

Bitmask aware compression of NISC control words.

Kanad Basu, Chetan Murthy, Prabhat Mishra

Integr., 2013

Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults.

Kanad Basu, Prabhat Mishra, Priyadarsan Patra

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Dynamic Selection of Trace Signals for Post-Silicon Debug.

Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

2012

A Novel Approach for Handling Misbehaving Nodes in Behavior-Aware Mobile Networking

Kanad Basu, Subrata Mitra, Srishti Mukherjee, Weixun Wang

CoRR, 2012

Constrained signal selection for post-silicon validation.

Kanad Basu, Prabhat Mishra, Priyadarsan Patra

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

2011

Efficient trace data compression using statically selected dictionary.

Kanad Basu, Prabhat Mishra

Proceedings of the 29th IEEE VLSI Test Symposium, 2011

Efficient Trace Signal Selection for Post Silicon Validation and Debug.

Kanad Basu, Prabhat Mishra

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Efficient combination of trace and scan signals for post silicon validation and debug.

Kanad Basu, Prabhat Mishra, Priyadarsan Patra

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods.

Kanad Basu, Prabhat Mishra

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

A novel test-data compression technique using application-aware bitmask and dictionary selection methods.

Kanad Basu, Prabhat Mishra

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008