Satish Grandhi

According to our database1, Satish Grandhi authored at least 7 papers between 2014 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
An EDA Framework for Reliability Estimation and Optimization of Combinational Circuits.
J. Low Power Electronics, 2016

Practical LDPC encoders robust to hardware errors.
Proceedings of the 2016 IEEE International Conference on Communications, 2016

CPE: Codeword Prediction Encoder.
Proceedings of the 21th IEEE European Test Symposium, 2016

2015
Inverse Gaussian distribution based timing analysis of Sub-threshold CMOS circuits.
Microelectronics Reliability, 2015

ROST-C: Reliability driven optimisation and synthesis techniques for combinational circuits.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014
Reliability aware logic synthesis through rewriting.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Linear Compositional Delay Model for the Timing Analysis of Sub-Powered Combinational Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014


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