Satoshi Sugahara

According to our database, Satoshi Sugahara authored at least 14 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Ultralow-Voltage Retention SRAM With a Power Gating Cell Architecture Using Header and Footer Power-Switches.

Hayato Yoshida, Yusaku Shiotsu, Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

IEEE Open J. Circuits Syst., 2021

2020

Proactive useless data flush architecture for nonvolatile SRAM using magnetic tunnel junctions.

Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

IEICE Electron. Express, 2020

2018

Design and Performance of Virtually Nonvolatile Retention Flip-Flop Using Dual-Mode Inverters.

Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

Proceedings of the 2018 New Generation of CAS, 2018

2016

Design and implementation of nonvolatile power-gating SRAM using SOTB technology.

Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Energy performance of nonvolatile power-gating SRAM using SOTB technology.

Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2015

Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology.

Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology.

Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service.

Ryosho Nakane, Yusuke Shuto, Hiroaki Sukegawa, Zhenchao Wen, Shuu'ichirou Yamamoto, Seiji Mitani, Masaaki Tanaka, Koichiro Inomata, Satoshi Sugahara

Proceedings of the European Solid-State Device Research Conference, 2013

2010

Spin-Transistor Electronics: An Overview and Outlook.

Satoshi Sugahara, Junsaku Nitta

Proc. IEEE, 2010

2009

Over Current Protection for PFM Control DC-DC Converter.

Kouhei Yamada, Satoshi Sugahara, Nobuo Fujii

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Nonvolatile SRAM (NV-SRAM) using functional MOSFET merged with resistive switching devices.

Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

High Efficiency PWM Controlled Micro DC-DC Converter for Portable Electronic Equipments.

Satoshi Sugahara, Kouhei Yamada, Tetsuya Kawashima, Masaharu Edo, Toshiro Sato, Kiyohito Yamasawa

IEICE Trans. Commun., 2008

2006

Spin MOSFETs as a basis for spintronics.

Satoshi Sugahara, Masaaki Tanaka

ACM Trans. Storage, 2006

A Frequency Compensation Technique for Variable Output Low Dropout Regulators.

Akira Yamazaki, Kouhei Yamada, Satoshi Sugahara

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006