Scott Pozder

According to our database1, Scott Pozder authored at least 5 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Comparison of Environmental Stressing Data and Simulation at the Corner of a Test Chip in a FC-BGA Package.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2011
Thermal-electrical co-optimisation of floorplanning of three-dimensional integrated circuits under manufacturing and physical design constraints.
IET Comput. Digit. Tech., 2011

2010
Interstratum Connection Design Considerations for Cost-Effective 3-D System Integration.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits.
Microelectron. J., 2010

2009
Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009


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