Sen Yin

Orcid: 0000-0003-1723-5415

According to our database1, Sen Yin authored at least 12 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

2023
Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

One-Dimensional Local Binary Pattern and Common Spatial Pattern Feature Fusion Brain Network for Central Neuropathic Pain.
Int. J. Neural Syst., 2023

2022
Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

On-line prediction of ultrasonic elliptical vibration cutting surface roughness of tungsten heavy alloy based on deep learning.
J. Intell. Manuf., 2022

A framework for motor imagery with LSTM neural network.
Comput. Methods Programs Biomed., 2022

A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

An Efficient Kriging-based Constrained Multi-objective Evolutionary Algorithm for Analog Circuit Synthesis via Self-adaptive Incremental Learning.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Large-scale Integrated Circuits Simulation Based on CNT-FET Model.
Proceedings of the International Conference on IC Design and Technology, 2021

Sensitivity Importance Sampling Yield Analysis and Optimization for High Sigma Failure Rate Estimation.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

An efficient optimization method of RF passive components using RBF model.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2018
Study on scalability of hybrid junctionless FinFET and multi-stacked nanowire FET by TCAD simulation.
IEICE Electron. Express, 2018


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