Zuochang Ye
According to our database1,
Zuochang Ye
authored at least 50 papers
between 2006 and 2023.
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Bibliography
2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
2022
Building Post-layout Performance Model of Analog/RF Circuits by Fine-tuning Technique.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
2021
Sensitivity Importance Sampling Yield Analysis and Optimization for High Sigma Failure Rate Estimation.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Proceedings of the IVSP '20: 2nd International Conference on Image, 2020
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
Adjoint Transient Sensitivity Analysis for Objective Functions Associated to Many Time Points.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Proceedings of the ICIT 2019, 2019
Distributed Deep Neural Network Training with Important Gradient Filtering, Delayed Update and Static Filtering.
Proceedings of the ICIT 2019, 2019
Proceedings of the International Conference on IC Design and Technology, 2019
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision, 2019
Proceedings of the Data Compression Conference, 2019
2018
Wideband Inductorless Low-Power LNAs with G<sub>m</sub> Enhancement and Noise-Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 3rd International Conference on Multimedia and Image Processing, 2018
Proceedings of the 6th International Conference on Information Technology: IoT and Smart City, 2018
Low-cost high-accuracy variation characterization for nanoscale IC technologies via novel learning-based techniques.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2016
A new Multi-Dose Method for extracting source/drain series resistances of halo-doped MOSFETs.
IEICE Electron. Express, 2016
Proceedings of the Sixth International Conference on Image Processing Theory, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
An Efficient SRAM Yield Analysis and Optimization Method With Adaptive Online Surrogate Modeling.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Efficient importance sampling for high-sigma yield analysis with adaptive online surrogate modeling.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
A Framework for Layout-Dependent STI Stress Analysis and Stress-Aware Circuit Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2012
Efficient Full-Chip Statistical Leakage Analysis Based on Fast Matrix Vector Product.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Efficient statistical capacitance extraction of nanometer interconnects considering the on-chip line edge roughness.
Microelectron. Reliab., 2012
Fast floating random walk algorithm formulti-dielectric capacitance extraction with numerical characterization of Green's functions.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 48th Design Automation Conference, 2011
Broadband compact model for on-chip mm-wave transformers and baluns with emphasis on capacitive coupling effects.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Numerical characterization of multi-dielectric green's function for floating random walk based capacitance extraction.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
A comprehensive model for gate delay under process variation and different driving and loading conditions.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Extended Hamiltonian Pencil for passivity assessment and enforcement for S-parameter systems.
Proceedings of the Design, Automation and Test in Europe, 2010
Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis.
Proceedings of the 47th Design Automation Conference, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
An efficient algorithm for modeling spatially-correlated process variation in statistical full-chip leakage analysis.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Fast and reliable passivity assessment and enforcement with extended Hamiltonian pencil.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Layout-dependent STI stress analysis and stress-aware RF/analog circuit design optimization.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
2008
Efficient Extraction of Frequency-Dependent Substrate Parasitics Using Direct Boundary Element Method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Generalized Krylov recycling methods for solution of multiple related linear equation systems in electromagnetic analysis.
Proceedings of the 45th Design Automation Conference, 2008
2006
Parasitics extraction involving 3-D conductors based on multi-layered Green's function.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006