Senwen Kan

According to our database1, Senwen Kan authored at least 8 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
IJTAG Integrity Checking with Chained Hashing.
Proceedings of the IEEE International Test Conference, 2018

Can Soft Errors be Handled Securely?
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017
Systematic Test Generation for Secure Hardware Supported Virtualization.
Proceedings of the 15th IEEE Intl Conf on Dependable, 2017

2016
A Case Study: Pre-Silicon SoC RAS Validation for NoC Server Processor.
Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

Echeloned IJTAG data protection.
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016

2015
A case study: Leverage IEEE 1687 based method to automate modeling, verification, and test access for embedded instruments in a server processor.
Proceedings of the 2015 IEEE International Test Conference, 2015

Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
Triggering Trojans in SRAM circuits with X-propagation.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014


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