Seonjin Na

According to our database, Seonjin Na authored at least 14 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2026

Accelerating RL Post-Training Rollouts via System-Integrated Speculative Decoding.

Hayate Iso, Tiyasa Mitra, Sudipta Mondal, Rasoul Shafipour, Venmugil Elango, Terry Kong, Yuki Huang, Seonjin Na, Izzy Putterman, Benjamin Chislett, Maor Ashkenazi, Joseph Guman, Gerald Shen, Tugrul Konuk, Ashwath Aithal, Ritika Borkar, Ran Zilberstein, Bita Rouhani

CoRR, April, 2026

CuFuzz: Hardening CUDA Programs through Transformation and Fuzzing.

Saurabh Singh, Ruobing Han, Jaewon Lee, Seonjin Na, Yonghae Kim, Taesoo Kim, Hyesoon Kim

CoRR, January, 2026

2025

Contention-Aware GPU Thread Block Scheduler for Efficient GPU-SSD.

Xueyang Liu, Seonjin Na, Euijun Chung, Jiashen Cao, Jing Yang, Hyesoon Kim

IEEE Comput. Archit. Lett., 2025

FlexInfer: Flexible LLM Inference with CPU Computations.

Seonjin Na, Geonhwa Jeong, Byung Hoon Ahn, Aaron Jezghani, Jeffrey Young, Christopher J. Hughes, Tushar Krishna, Hyesoon Kim

Proceedings of the Eighth Conference on Machine Learning and Systems, 2025

Swift and Trustworthy Large-Scale GPU Simulation with Fine-Grained Error Modeling and Hierarchical Clustering.

Euijun Chung, Seonjin Na, Sung Ha Kang, Hyesoon Kim

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors.

Sunho Lee, Seonjin Na, Jeongwon Choi, Jinwon Pyo, Jaehyuk Huh

Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

Let-Me-In: (Still) Employing In-pointer Bounds Metadata for Fine-grained GPU Memory Safety.

Jaewon Lee, Euijun Chung, Saurabh Singh, Seonjin Na, Yonghae Kim, Jaekyu Lee, Hyesoon Kim

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

2024

Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs.

Yuan Feng, Seonjin Na, Hyesoon Kim, Hyeran Jeon

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

Understanding Performance Implications of LLM Inference on CPUs.

Seonjin Na, Geonhwa Jeong, Byung Hoon Ahn, Jeffrey Young, Tushar Krishna, Hyesoon Kim

Proceedings of the IEEE International Symposium on Workload Characterization, 2024

Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management.

Seonjin Na, Jungwoo Kim, Sunho Lee, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training.

Jungwoo Kim, Seonjin Na, Sanghyeon Lee, Sunho Lee, Jaehyuk Huh

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2022

Tunable Memory Protection for Secure Neural Processing Units.

Sunho Lee, Seonjin Na, Jungwoo Kim, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit.

Sunho Lee, Jungwoo Kim, Seonjin Na, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Common Counters: Compressed Encryption Counters for Secure GPU Memory.

Seonjin Na, Sunho Lee, Yeonjae Kim, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021