Seyed Alireza Damghani

According to our database1, Seyed Alireza Damghani authored at least 7 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

2022
Machine Learning-Based Hard/Soft Logic Trade-offs in VTR.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2022

Yosys+Odin-II: The Odin-II Partial Mapper with Yosys Coarse-grained Netlists in VTR.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

Odin-II Partial Technology Mapping for Yosys Coarse-grained Netlists in VTR.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021
Heterogeneous Logic Implementation for Adders in VTR.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2021

Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
Desired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II.
Proceedings of the International Workshop on Rapid System Prototyping, 2020


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