Jean-Philippe Legault

According to our database1, Jean-Philippe Legault authored at least 8 papers between 2018 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Evaluating the Performance of the Eclipse OpenJ9 JVM JIT Compiler on AArch64.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022

2020
VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling.
ACM Trans. Reconfigurable Technol. Syst., 2020

Desired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II.
Proceedings of the International Workshop on Rapid System Prototyping, 2020

Hard and Soft Logic Trade-offs for Multipliers in VTR.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II.
Proceedings of the 30th International Workshop on Rapid System Prototyping, 2019

Improving Digital Circuit Simulation with Batch-Parallel Logic Evaluation.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Towards Trainable Synthesis for Optimized Circuit Deployment on FPGA.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

2nd workshop on advances in open runtime technology for cloud environments.
Proceedings of the 28th Annual International Conference on Computer Science and Software Engineering, 2018


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