Shaochong Lei

Orcid: 0000-0002-4214-6863

According to our database1, Shaochong Lei authored at least 16 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
A High-Performance and Low-Cost Montgomery Modular Multiplication Based on Redundant Binary Representation.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Design and Application of Mixed Natural Gas Monitoring System Using Artificial Neural Networks.
Sensors, 2021

2020
A low-cost and high-speed hardware implementation of spiking neural network.
Neurocomputing, 2020

2019
A Novel and High-Performance Modular Square Scheme for Elliptic Curve Cryptography Over GF( ${p}$ ).
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Mixed Natural Gas Online Recognition Device Based on a Neural Network Algorithm Implemented by an FPGA.
Sensors, 2019

2018
A Reduced GO-Graphene Hybrid Gas Sensor for Ultra-Low Concentration Ammonia Detection.
Sensors, 2018

2013
Test Patterns of Multiple SIC Vectors: Theory and Application in BIST Schemes.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
Low-power programmable linear-phase filter designed for fully balanced bio-signal recording application.
IEICE Electron. Express, 2012

2011
Design of Four-wave Oscillating Cellular-Neural-Network.
IEICE Electron. Express, 2011

A test pattern generation method with high compression ratio.
IEICE Electron. Express, 2011

An Optimized Seed-based Pseudo-random Test Pattern Generator: Theory and Implementation.
J. Electron. Test., 2011

2010
A Low Power Test Pattern Generator for BIST.
IEICE Trans. Electron., 2010

A unified solution to reduce test power and test volume for Test-per-scan schemes.
IEICE Electron. Express, 2010

A low cost test pattern generator for test-per-clock BIST scheme.
IEICE Electron. Express, 2010

2008
A Class of SIC Circuits: Theory and Application in BIST Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Single Input Change Test Pattern Generator for Sequential Circuits.
IEICE Trans. Electron., 2008


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